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Hello,the following code is generated by CubeMX 6.11.1 in module stm32l4xx_it.c:/** * @brief This function handles TIM1 trigger and commutation interrupts and TIM17 global interrupt. */ void TIM1_TRG_COM_TIM17_IRQHandler(void) { /* USER CODE BE...
Hello,I've migrated an application from STM32L496VG to STM32U595VJ.Pin A11 is used as capture input TIM1_CH4.With U5 device the input on PA11 couldn't reach full level at 3.3V. I have the same behavior with 5 MCUs STM32U595VJT6 and PA11 is connected ...
Hello,I have 10 devices STM32L496VG in Dual-Bank-Boot mode with the identical firmware in BANK1 and BANK2.In 5 devices is booting from BANK1 enabled (BFB reset) and in the other 5 devices is booting from BANK2 enabled (BFB set).I would expect the sam...
I've read often about strange problems with activated D cache on M7 core and how it can be solved here in forum.But the STM32F7xx family has implemented a fast DTCM RAM that is accessible from CPU core and DMA peripherals.This DTCM memory should have...
I tried to update an existing and working STM32F7 project to the new ethernet driver.(MCU STM32F777BIT6 / STM32Cube FW_F7 V1.17.0 / CubeMX 6.6.1)But there are some problems with this new driver:1. A Bug in generated function "ethernet_link_thread" in...
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