Showing results for 
Search instead for 
Did you mean: 

STM32L496VG Dual-Bank-Boot: Different boot behavior between BANK1 and BANK2



I have 10 devices STM32L496VG in Dual-Bank-Boot mode with the identical firmware in BANK1 and BANK2.
In 5 devices is booting from BANK1 enabled (BFB reset) and in the other 5 devices is booting from BANK2 enabled (BFB set).
I would expect the same behavior on all devices but there seems to be some differences in timing behavior.
So the IWDG bit is set on reset source (RCC_CSR) at switch-on-startup on all Boot-Bank2 devices (IWDG timeout might be a little bit tight). There it seems that the cold startup time is significant longer and runs into IWDG reset once but then it works at the second (hot) startup.
Maybe that internal swap of all addresses from BANK2 to BANK1 (base 0x08000000) takes some additional time?

Therefore the questions:
Are there differences on booting from BANK1 vs. BANK2?
Is the operation in BANK2 really slower and is this only at startup or always?