About JPoha.1

JPoha.1 · 2020-11-12

Hello,this is a description of PLL settings from a reference manal00: The PLL1 input (ref1_ck) clock range frequency is between 1 and 2 MHz (default after reset)01: The PLL1 input (ref1_ck) clock range frequency is between 2 and 4 MHz10: The PLL1 inp...

JPoha.1 · 2020-10-30

Hello,I have met an issue regarding STM32H750 revision change. Originally we used old MCU package v1.5.0 which is not compatible with revision V. It fills wrong value into RCC_HSICFGR register and HSI runs on wrong frequency then. This was fixed in n...

JPoha.1 · 2020-11-12

Thanks for reply. I know that both is working :)Do you know, what these settings actually do and what happens if the difference would be bigger?

JPoha.1 · 2020-10-30

> Edit: oh they actually did fix it, mostly.yes, it seems that it is somehow fixed in the HAL, but not in LLActually I do not understand why they even touch these registers, it will be easier to keep the reset value.

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STM32H7xx - PLL input frequency range settings

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