About Mahesh Chamaraja

Mahesh Chamaraja · 2017-01-25

Posted on January 25, 2017 at 14:58Hello all,We are facing some difficulties with FlexRay driver development for SPC564A80B4. We can able to configure the Protocol Control Registers (PCR0~31) for FR configurations, so that ECU and FlexRay module s...

Mahesh Chamaraja · 2017-01-21

Posted on January 22, 2017 at 06:58Hello, I configured in enhanced mode for system clock generation, our input clock is 40Mhz external crystal and need to generate 150Mhz system clock. Since hardware is not supported to check CLKOUT pin for system...

Mahesh Chamaraja · 2017-03-14

Posted on March 14, 2017 at 09:34 Hello Erwan, Sorry for the delay Can I know the values for this macros? SPC5_FLASH_WS SPC5_FLASH_BIUCR

Mahesh Chamaraja · 2017-02-08

Posted on February 09, 2017 at 07:44Hello Erwan,I'm waiting for reply. check above clock settings.Best regardsMahesh

Mahesh Chamaraja · 2017-02-02

Posted on February 02, 2017 at 13:48Hello Erwan,Our own driverRegardsMahesh

Mahesh Chamaraja · 2017-02-02

Posted on February 02, 2017 at 13:44Hello Erwan,Please check our clock configuration. MhzRegardsMahesh

Mahesh Chamaraja · 2017-02-01

Posted on February 02, 2017 at 04:48Hello Erwan,Yes above steps i followed to program the FMPLL and engage normal mode but '3rd' point not configured, frequency modulation not required.RegardsMahesh

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Based on FlexRay communication driver development for SPC564A80B4

Im working for bootloader on SPC564A80B4. Facing issues in system clock generation

Re: Im working for bootloader on SPC564A80B4. Facing issues in system clock generation

Re: Im working for bootloader on SPC564A80B4. Facing issues in system clock generation

Re: Based on FlexRay communication driver development for SPC564A80B4

Re: Im working for bootloader on SPC564A80B4. Facing issues in system clock generation

Re: Im working for bootloader on SPC564A80B4. Facing issues in system clock generation