About mickminn

mickminn · 2021-06-11

Hello,I have a dual core project on an STM32H745. Timer 8 is used by the CM7, Timer 13 is used by the CM4. Timer 8 and Timer 13 share an IRQ, "TIM8_UP_TIM13_IRQHandler".I've double checked the setup and:CM7 RCC_C1_APB2ENR has TIM8 set and RCC_C1_APB1...

mickminn · 2021-03-03

Hello,I am using a STM32H745ZI in a project and have USART1 configured as a UART. I updated STM32CubeMX to version 6.2.0 today and the clock page is telling me that "USART1,6 clock source frequency must be <= 75 MHz", as per image attached.Earlier ve...

mickminn · 2019-08-22

Hello,I have been having problems with my debugger losing connection when i set the CM7 of my STM32H745 into CSleep mode. I have the DBGMCU flags set to enable debugging in low power, but I assumed I was still doing something incorrect with the domai...

mickminn · 2019-08-06

Hi,As the title says really. What do the dividers I have highlighted in the screengrab correspond to in the processor? The options in those boxes are "/1" and "/8" and the names "Cortex Div" and "Cortex2 Div" appear when you hover the mouse over them...

mickminn · 2019-08-06

Hi,I'm using a STM32H745 and looking at RM0399 rev 2. In table 15 for the flash memory timings there are no values for VOS0 range and the maximum frequency in the table is 225MHz. Going by other sections of the document the maximum Faclk is 240MHz.I ...

mickminn · 2021-03-03

Thank you.

mickminn · 2021-03-03

Hello Khouloud,I have reduced it to a minimal configuration which shows the same issue.Thank you.

mickminn · 2019-08-07

Hi Clive,You're right. I was looking in the Systick section of the programmering manual for both the CM7 and CM4 and managed to miss it, but I have now found the bit in the Systick control register as you said.Thank you.

mickminn · 2019-08-07

Deleted, was meant to be reply.

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How can I prevent shared ISR from triggering the opposite core?

How stringent are the limits on the "General Operating Conditions"?

Possible bug in STM32Cube_FW_H7_V1.5.0 SystemInit() function

What do the "Cortex Div" and "Cortex2 Div" dividers in STM32CubeMX correspond to in the STM32H745?

What are the correct values for embedded flash wait state setting and programming delays for VOS0 range and AXI clock 240MHz?

Re: How stringent are the limits on the "General Operating Conditions"?

Re: How stringent are the limits on the "General Operating Conditions"?

Re: What do the "Cortex Div" and "Cortex2 Div" dividers in STM32CubeMX correspond to in the STM32H745?

Re: What do the "Cortex Div" and "Cortex2 Div" dividers in STM32CubeMX correspond to in the STM32H745?