Posted on January 16, 2017 at 16:43A real simple questoin here, I'm a hardware guy...sorry.Looking at the stm32F7 data sheets, and using the fmc in NOR flash mode. From the software perspective, would you have a lump of code that does the sequence ...
Posted on January 06, 2017 at 11:23Looking at the STM32F7 , going to H7 when available.Have some external peripherals that are SPI , but, need 24 bits of data in a frame. i.e. the SPI CS goes active for 24 data bits, then in active at the end, ...
Posted on January 03, 2017 at 16:18Would like to check out the STM32H7 chips, See if they can do the combination of functions we want, On the F7, we used the cube software, but H7 not supported ( yet ) in the cube.Any thoughts / idea when the...
Posted on January 17, 2017 at 12:52Thanks JanNow I know what the FSMC is, that's been bugging me.good idea on the nucleo board, 'just' need to convince the software people at the client..Good point about the cube software,I'm doing hardware, and...
Posted on January 17, 2017 at 09:45Thank you all for the replies, General, its the speed / latency we are trying to improve, and the synchronizes are needed for the current sram based asynchronous interface, hence why looking at can we get a synchr...
Posted on January 16, 2017 at 17:21Hi JanMeta stability .its a hardware problem we have to overcome.The FPGA will have to accept the signals from the STM32F7, such as NOE and NWE, and sample them on its internal clock so they can drive the state...
