About Wolfgang Pupp

Wolfgang Pupp · 2022-09-30

I'm unable to find any information on the STM32H7 instruction prefetch behavior (from QSPI/octospi).My usecase/problem: I have a piece of startup code (executed from external QSPI) that moves the main application into (executable) RAM (this is basica...

Wolfgang Pupp · 2021-08-19

Bug:CubeMX codegeneration for the RCC (clock module) may lead to hardfault during clock initialization.I have a minimal example IOC (attached).This faults during RCC initialization (in SystemClock_Config), after LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKS...

Wolfgang Pupp · 2021-08-18

Edit: I managed to narrow this down and create a reproducible, minimal example.Posted as bug-report here: https://community.st.com/s/question/0D53W000011uLtPSAU/stm32h7-cubemx-critical-codegeneration-bug-rccllIn my opinion the CubeMX generated clock ...

Wolfgang Pupp · 2021-07-30

When configuring ADC3 for VREF and/or TEMP acquisition then the necessary call to LL_ADC_SetCommonPathInternalCh(ADC3_COMMON, LL_ADC_PATH_INTERNAL_TEMPSENSOR | LL_ADC_PATH_INTERNAL_VREFINT);is not made. This is necessary for those channels to functio...

Wolfgang Pupp · 2021-07-30

ADC3 is broken when using the LL interface.1) This is because it gets initialized with invalid resolution bits:CubeMX currently generates: ADC_InitStruct.Resolution = LL_ADC_RESOLUTION_12B; ADC_InitStruct.LowPowerMode = LL_ADC_LP_MODE_NONE; LL...

Wolfgang Pupp · 2022-09-30

The information is in the firmware itself: If you have any variable that "lives" inside your bss section, then the exact address of that variable is embedded (by the linker) when you compile your hex/bin/elf/dfu file.The linker script provides the ne...

Wolfgang Pupp · 2021-10-07

I'd advise to prefer 8Mhz oscillators if you have a CAN application because this makes for painfree prescaler/bit timing configuration (with the frequently recommended 87.5% sample point), which can be annoying to do if you have a more exotic periphe...

Wolfgang Pupp · 2021-10-07

He means that you can only run code from RAM while your flash memory is being erased.The only practical way is to place ALL your code in RAM (VTOR also!).You can do this by modifying the linker script + startup code, so that your .text section, isr_v...

Wolfgang Pupp · 2021-09-30

Id suggest using the SCB->CPUID register for CPU detection. See "programming manual" for details.Architecture wise, I would stick as close as possible to:Tiny bootloader (CPU agnostic)Implementation for H7Implementation for F7If you lack memory, and ...

Wolfgang Pupp · 2021-08-19

Generally, its possible to just enter the bootloader directly.There are a few caveats though:You should get everything (peripherals, clocks) into default state before you do this to avoid problems.Active external peripherals might prevent the builtin...

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Where to find infos/specification of instruction prefetch behavior/required alignment (STM32H7/QSPI)

STM32H7 CubeMX critical codegeneration bug (RCC+LL)

STM32H7 CubeMX RCC Init order bug causes hardfault

STM32H7/CubeMX bug with ADC3 and LL when using VREF/TEMP

H7/CubeMX critical bugs with LL and ADC3

Re: How does the STM32 knows where should the .BSS section be addressed,and what's the range,when the chip startup initially?

Re: Crystal Oscillator Verification

Re: Erasing flash during RTOS task execution on STM32F4

Re: Is it feasible to have single hex for both STM32F769 and STM32H743?

Re: Active BOOT0 by software on STM32L432