About BStud.1

BStud.1 · 2021-12-04

Hello there.On my board I've setup DCMI to read some arbitrary data from ADC. I've planed to use JPEG mode to just capture all the raw data from ADC while HSYNC is in LOW state. There is my timing diagram:The thing is I do not get FRAME interrupt nor...

BStud.1 · 2021-11-25

Hello there.Our design currently utilizes MDMA for intensive writes from SRAM4 to FMC bus area. Transfer is setup with double word transactions, witch is critical for performance. DMA 1/2 or BDMA is simply do not cut it due to lack of AXI access i gu...

BStud.1 · 2021-11-21

Hello there.I've setup simple transfer from SRAM4 to FMC NE1 on my STM32H750 board using MDMA. Write transfer itself complites, however no MDMA callbacks is ever called. After some digging i've found out that HAL_MDMA_IRQHandler is never called. On t...

BStud.1 · 2021-12-04

So I was able to circle up my MDMA transfer and it is working fine. The key thing was MDMA's LAR register. Address that it points must aligned by 64 bits and must lie in AXI memory space. @Community member Yeah, this is pretty stupid architecture bu...

BStud.1 · 2021-11-21

Found the solution: https://community.st.com/s/question/0D53W00000iFgQh/stm32h745-mdmairqhandler-is-missing-in-stm32h7xxitc . Cannot delete this post, sorry.

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DCMI in JPEG mode DMA configuration?

Hardware trigger for MDMA?

How do I enable MDMA_IRQHandler using STM32CubeIDE?

Re: Hardware trigger for MDMA?

Re: How do I enable MDMA_IRQHandler using STM32CubeIDE?