About Matthew Richardson

Matthew Richardson · 2018-06-11

Posted on June 11, 2018 at 10:15I feel like I am not finding an explicit answer to this question in the errata. I notice that the SPC56 has a 5V tolerant ADC, but I am wondering if I can use 5VDC logic for the GPIO pins? I have some legacy 5V shif...

Matthew Richardson · 2018-04-30

Posted on April 30, 2018 at 22:24I have DO-160 testing to do on some avionics units. This certification is destructive, and I frankly do not know if the SPC will survive the MOPS in my particular application. A lot of this is empirical [not analys...

Matthew Richardson · 2018-03-23

Posted on March 23, 2018 at 09:21I don't think I have a timer enabled. I don't see the WDT setting in the outline, but in the configuration.xml it is disabled. Most importantly clock_cfg.h is generated as '#define SPC5_DISABLE_WATCHDOG ...

Matthew Richardson · 2018-02-23

Posted on February 23, 2018 at 10:14I have a DPM configuration for SPC56EL70. I initially had some trouble getting the debugger to connect to the target ( could connect fine in LSM.) The problem had to do with not clearing the LSM_DPMB bit. Erwan...

Matthew Richardson · 2018-02-19

Posted on February 20, 2018 at 08:36I am wanting to run in DPM . I use SPC5Studio to create a .wsx configuration to debug with, but I get the following failure when I try to connect to the target:----------------------------------------------------...

Matthew Richardson · 2018-06-11

Posted on June 11, 2018 at 20:22I don't feel like that data sheet is explicit. I understand that the ADC pins are 5 Volt tolerant when the ADC Reference is 5V, but I guess this is mostly for ADC register conversion reasons, not hardware?. ADC pads...

Matthew Richardson · 2018-03-27

Posted on March 27, 2018 at 18:17I think it is a stack-overflow issue of some kind. I am still investigating, and will get back to this issue. Many thanks Erwan.

Matthew Richardson · 2018-03-25

Posted on March 25, 2018 at 08:33This one took me a while to troubleshoot. The unit will literally run for hours without crashing, then sometimes only five minutes and crash without changing any code. I think the issue has something to do with ser...

Matthew Richardson · 2018-02-28

Posted on March 01, 2018 at 07:23I feel like I am close. Setting the channel 2 PIT priority to 0 in INTC_0 does prevent core0 from triggering an interrupt. However, setting a priority for INTC_1 hasn't worked for me yet; core1 never runs the PIT C...

Matthew Richardson · 2018-02-27

Posted on February 28, 2018 at 00:37So the second core (Core1) cannot run a PIT handler function like Core0 can?

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SPC56 5V Tolerant Logic Levels

Looking for some SPC56EL70 Processors, anyone?

SPC56EL Watchdog Timer Interrupt (IVOR12) triggering, but WDT not enabled?

Debugging Dual Core SPC56

SPC56 Decoupled Parallel Mode

Re: SPC56 5V Tolerant Logic Levels

Re: SPC56EL Watchdog Timer Interrupt (IVOR12) triggering, but WDT not enabled?

Re: SPC56EL Watchdog Timer Interrupt (IVOR12) triggering, but WDT not enabled?

Re: Debugging Dual Core SPC56

Re: Debugging Dual Core SPC56