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TLN_1
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2022-08-03
2023-06-14
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Changing the logical Level on Pin PA0 causes a peak on SDADC input (PB0 and PE9) with STM32F373CCT.
2022-08-03
I work with the STM32CubeIDE.Has got someone the same problem?The VREF Pins have got a stable voltagelevel.Pin PA0 is not physically connected to a device or a wire.
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