Posted on August 23, 2011 at 11:42For your problem, I think that using an DSB instruction is better. The definition of this instruction is exactly what you need : Instructions that come after the DSB, in program order, do not execute until the DSB ...
Posted on June 28, 2011 at 12:53Hello, On rev 12 of RM0008 manual, §18.4.3 (page 471), the description of PRLH and PRLL notes that these registers are write only. So I think that the value readed by the debugger is not valid. Even when debugger or p...
Posted on May 17, 2011 at 14:12Hello, It's a compromise by ST. If you want that each pin of each port can generate its own interrupt, with 7 ports on 144 pins device, you obtain a total of 112 interrupts vectors. I don't know any application with 11...
Posted on May 17, 2011 at 14:12Hello, You can use first syntax with #pragma if you declare first the struct and after you reserve it. struct s_tempor { int x ; int y ; } ; #pragma location=0x0801FFFE __no_init struct s_tempor tempor ; Be carre...
Posted on May 17, 2011 at 14:11Hello, I think you can't have interrupt from PA8 AND PC8 at the same time (see figure 21 in chapter 9.2.5 in RM0008). To generate EXTI_Line8 interrupt, you have to configure EXTI8 in AFIO_EXTICR3 register to tell if EX...