Posted on May 17, 2011 at 13:17I think NSS signalize to host request for transfer so that the host can start clock. I read there is some bug in STM32Fxxx. Best regards. ;)
Posted on May 17, 2011 at 13:17Thank you for your interest. I am using STM32F103xx processor and I did not see how to configure SPI port like 2wire. I compared several ST design and I think that they use emulated SPI. Do you know some? I also found ...
Posted on May 17, 2011 at 13:17Dear Sir I know SPI signals like SCK (clock from host), MOSI (master output slave input), MISO (master input slave output), NSS (slave riquest) and optionaly CS ( chip select). ******************************** Datashee...
