STM32N6 RIF code generator EXTI attributes misuse

[Mikk Leini]

Cube MX v6.17.0 and even previous version v6.16.1 have a problem generating SystemIsolation_Config for STM32N6.

I made a test IOC file. There are 3 SECURE checkboxes checked in RIF -> RIF Aware IPs -> EXTI1:

• Line 13 for  EXTI13
• Line 17 for RTC secure-wakeup
• Line 62 for Wake-up PIN3

Screenshot:

Generated SystemIsolation_Config(void) in main.c of FSBL contains:

  /* set up EXTI configuration */
  /* EXTI13 line */
  HAL_EXTI_ConfigLineAttributes(13,EXTI_LINE_SEC|EXTI_LINE_NPRIV);
  /* RTC secure wake-up line */
  HAL_EXTI_ConfigLineAttributes(17,EXTI_LINE_SEC|EXTI_LINE_NPRIV);
  /* Wake-up_PIN3 line */
  HAL_EXTI_ConfigLineAttributes(62,EXTI_LINE_SEC|EXTI_LINE_NPRIV);

These calls fail in this assert in stm32n6xx_hal_exti.c:

  assert_param(IS_EXTI_LINE(ExtiLine));

Full assert is turned on in IOC so it lands in assert_failed.

The assert condition check macro is very messy, but it appears like it expects type and register mask with it so I added them (based on table 138. EXTI line connection in RM0486 Rev 3):

  /* set up EXTI configuration */
  /* EXTI113 line */
  HAL_EXTI_ConfigLineAttributes(EXTI_REG1|EXTI_GPIO|13,EXTI_LINE_SEC|EXTI_LINE_NPRIV);
  /* RTC secure wake-up line */
  HAL_EXTI_ConfigLineAttributes(EXTI_REG1|EXTI_DIRECT|17,EXTI_LINE_SEC|EXTI_LINE_NPRIV);
  /* Wake-up_PIN3 line */
  HAL_EXTI_ConfigLineAttributes(EXTI_REG2|EXTI_DIRECT|(62 % 32),EXTI_LINE_SEC|EXTI_LINE_NPRIV);

Note that line number 62 must be re-indexed for second register.

HAL_EXTI_ConfigLineAttributes function comment does not say that it expects such things from ExtiLine argument. So HAL needs some documentation update also.

[Ghofrane GSOURI · Accepted solution]

Hello @Mikk Leini 

Your detailed explanation is much appreciated.

The issue has been escalated to the development team to fix the code generation problem and update the HAL documentation accordingly. 

Ticket ID is #0061341 

I will keep you posted with updates.

THX

Ghofrane