Use of RTOS on A7 cores

[RLeig.2]

Hi there,

I would be interested to know if there is any guidance or any existing example projects for using the STM32MP1 with an RTOS on the A7 cores. I am interested in the possibility of running an RTOS like ThreadX/SMP on the A7 cores (plus the M4 core separately).

If this is possible, can the headers from the MP1 HAL be used? Are the memory-mapped peripherals all still accessible at the same base addresses on both the M4 and A7 sides?

And regarding the Vivante GPU, is that possible to drive directly without the Linux driver? Are there any public datasheets? I've seen some open-source projects which have reverse-engineered the opcodes. Are there any more official projects or documentation resources for this device?

Many thanks,

Roger

[OlivierK · Accepted solution]

Hi RLeig.2 (Community Member) 

At present, there is no such guidance for STM32MP1 precisely on bare-metal Cortex A7 core. But the subject is in the pipe.

Now for bare metal Cortex A7/A9 free RTOS implementations existing. you could get inspired by this:

https://www.freertos.org/RTOS-Xilinx-Zynq.html

https://www.freertos.org/Using-FreeRTOS-on-Cortex-A-Embedded-Processors.html

Regards,

Olivier