Support for CSI-2

[Will_Robertson]

I'm wondering if anyone has any advice re. microcontroller (#MCU) support for #CSI-2?

ST application note AN5478 "STM32MP135 line interfacing with a MIPI® CSI-2 camera" written in 2023 seems to be the best reference that I can find on this and uses the STMIPID02 MIPI CSI-2 deserializer.

https://www.st.com/resource/en/application_note/DM00697325.pdf

SD do provide an internal peripheral for CSI-2:

https://wiki.st.com/stm32mpu/wiki/CSI_internal_peripheral

ST application note AN5470 on #STM32MP15x "STM32MP15x Series interfacing with a MIPI® CSI-2 camera" written in 2020 and updated in 2023 uses the same deserializer and says that:

"it is possible to extend the range of addressable camera sensors for instance MIPI® CSI-2 cameras (camera serial interface), thanks to the STMIPID02 MIPI CSI-2 deserializer discrete component"

https://www.st.com/resource/en/application_note/dm00693021-stm32mp15x-series-interfacing-with-a-mipi-csi2-camera-stmicroelectronics.pdf

The "D3 DesignCore camera mezzanine board OV5640" referred to in AN5470 was designed in 2017 and no longer seems to be available in 2024.

ST made this CSI-2 camera board available in August 2024:

https://www.st.com/en/evaluation-tools/steval-cam-m0i.html

One workaround for microcontrollers that don't support CSI-2 may be that some cameras support #I2C - I2C fast mode or I2C fast-mode plus - I don't know if these can reach the same transmission rates as CSI-2 though nor how well supported they are - and careful design can be needed to avoid problems with interference in I2C buses.

One other option I'm looking at is the #SAMA7G54 "New 1 GHz SAMA7G54 is the First Single-Core MPU with MIPI CSI-2 Camera Interface" which was launched in 2022.

https://www.microchip.com/en-us/about/news-releases/products/new-1ghz-sama7g54-is-the-first-single-core-mpu-with-mipi-csi-2

The Analog Devices #MAX78002 data sheet dated 2022 states

"Multiple high-speed and low-power communications interfaces are supported, including I2S, MIPI® CSI-2® serial camera"

https://www.analog.com/media/en/technical-documentation/data-sheets/MAX78002.pdf

This field is rapidly changing so I've included dates in the above.

CSI-2 is supported by SBCs for example the Raspberry Pi Camera Module 3 (Sony #IMX708 ) with a Raspberry Pi SBC however the power consumption of SBCs is significantly higher than microcontrollers and I haven't found any SBC that can rapidly wake from a low power sleep mode in the way that some microcontrollers can.

https://datasheets.raspberrypi.com/camera/camera-module-3-product-brief.pdf

[STOne-32]

Dear @Will_Robertson ,

You can refer to our STM32MP25 : Arm® based dual Cortex®-A35 1.5 GHz + Cortex®-M33 MPU, AI, 3D GPU,
video encoder/decoder, TFT/DSI/LVDS, USB 3.0, PCIe

Datasheet - STM32MP251A/D STM32MP253A/D STM32MP255A/D STM32MP257A/D - Arm® based dual Cortex®-A35 1.5 GHz + Cortex®-M33 MPU, AI, 3D GPU, video encoder/decoder, TFT/DSI/LVDS, USB 3.0, PCIe®

It supports natively Camera CSI-2 

Hope it helps you.

STOne-32.

[Will_Robertson]

Dear @STOne-32 ,

Thank you very much! That looks a great match for what we need!

Would this be the best evaluation board to try?

https://wiki.st.com/stm32mpu/wiki/Category:STM32MP25_Evaluation_boards

Will

[PatrickF]

Hi @Will_Robertson 

Both boards listed below are suited for STM32MP2 Camera evaluation :

STM32MP257F-EV1

STM32MP257F-DK (available in some weeks)

Choice between both depend on which final application you want to evaluate before going to develop your own board/product.

EV1 is more industrial oriented (3 x Ethernet, DDR4 USB2.0, PCIe, FDCAN, DSI, CSI, LVDS)

DK is more consumer oriented (USB3.0, LPDDR4, HDMI, WLAN/BT, audio, CSI, LVDS)

You might need to purchase camera and display separately:

7" LVDS 1024x600 Display B-LVDS7-WSVGA

5MP CSI Camera + inertial motion unit + Time‑of‑Flight sensor B-CAMS-IMX

Note that STM32MP2x products are not MCUs but MPU. I.e. intended first to run Linux on Cortex-A processor and bare metal coprocessing on Cortex-M processor.

Many information also on ST MPU wiki : https://wiki.st.com/stm32mpu/wiki/Main_Page

Regards.

[Will_Robertson]

Hi @PatrickF 

Thank you very much! It's wonderful to have the two development boards aimed at the industrial and the consumer markets! Really looking forward to the STM32MP257F-DK board becoming available!

For our application, minimising power consumption is important - to do this we plan to keep the system in a low-power inactive state most of the time and to bring it into a high power active state when needed in response to an external input.

Roughly how quickly is it possible to bring these MPUs from a low power state to an active state?

Thank you very much for your help!

Will

[PatrickF · Accepted solution]

Hi,

For an indication of time to wake up Linux, please have a look to MP15 value here: https://wiki.st.com/stm32mpu/wiki/How_to_define_your_low-power_strategy#Overview_2.
STM32MP2 would be on similar ballpark (let's says Linux console prompt <1s from Standby and <100ms from xxSTOP). I guess it could still be slightly optimized versus our default Starter Package.

Typical power (VDDCORE+VDDCPU+VDD(1.8V)+VDDA18AON) is around 16mW for LPLV-Stop2 and 1.2mW for Standby2.

These figures does not take into account other components (STPMIC and DDR self-refresh power in particular).

Regards.

[Avgerinos]

Hello,

I had the same question and the STM32MP25 seems a solution to use for a MIPI CSI-2 input.
But I was wondering if there is an alternative IC to the STMIPID02 MIPI CSI-2 deserializer?

My main goal is to be able to interface a MIPI CSI-2 video input to a STM32F7 series MCU.
For this reason I am looking for a solution on how can I convert a MIPI CSI-2 to parallel interface that would be compatible with the DCMI peripheral.

Thank you

[Will_Robertson]

Hi @PatrickF 

Thank you very much!

The <100ms from xxSTOP and 16mW for LPLV-Stop2 are great! Is there anything I should bear in mind when managing the DDR self refresh power requirements?

I'm looking at designing an open source wildlife camera for ecologists working on small mammal conservation which delivers better reliability, better flexibility and better image quality than anything on the market at the moment. The hope would be to power this via a solar panel charging PbA or LiFePO4 batteries with the system wakening from a low power sleep state in response to a signal from external PIR sensors (via GPIO) to record video then returning to sleep.

Using a CSI-2 interface allows a wide choice of cameras optimised for specific conditions while the other connectivity on the STM32MP257F-DK board will allow ecologists to check the system and download data from a distance without risking their lives climbing trees to the camera module to change batteries or SD cards.

Most of my experience is in commercial software engineering (C#/.Net and Python) and aerial arboriculture and I haven't done any commercial electronics development for several years so your advice and the STM32MP257F-EV1 and planned STM32MP257F-DK development boards are an enormous help getting a prototype developed and tested rapidly!

Will

[Will_Robertson]

HI @Avgerinos 

I was also looking at using the STMIPID02 MIPI CSI-2 deserializer between a CSI-2 camera and high end MCU but I was hoping that I could find a monolithic solution that avoids the extra complexity of a separate deserializer chip.

For our application it looks like the STM32MP25 may be able to wake fast enough from a low power sleep state to be a viable alternative to an MCU but I think you're right that there will be some applications where getting CSI-2 directly into a high-end MCU like the STM32F7 series would be valuable.

Will

[Will_Robertson]

Hi @Avgerinos , @PatrickF and @STOne-32 

I reckoned I'd update this thread for anyone finding it in future.

The ST STM32N6 Series μCs launched in December 2024 include a MIPI CSI-2 interface, hardware ISP (Image Signal Processor), H264 hardware encoder and NPU allowing them to handle the complete video pipeline from camera interface to implementation of neural networks such as CNNs (Convolutional Neural Networks) for image recognition.

Will