2024-04-16 12:18 AM
Hello! I am developing a custom board based on STM32MP151C MPU (TFBGA 361pins) with a RMII Ethernet PHY, and I have a simple question regarding to the PHY interrupt signal -sorry if this is a duplicated question, I haven't found a related topic in the forum-.
Is it mandatory to route the PHY interrupt output signal to a ETH1_PHY_INTN pin (any of the pins with this alternate function available) to capture interrupts? I have checked evaluation boards, and:
If PHY interrupt pin can be routed to any MP1 interrupt-capable pin, what is the purpose of the ETH1_PHY_INTN alternate function?
Many thanks in advance. Regards,
Solved! Go to Solution.
2024-04-25 06:55 AM - edited 2024-04-25 06:56 AM
Hi @jmglez,
The purpose of ETH1_PHY_INTN is to catch event from PHY (plug/unplug, WoL....)
It is not mandatory to route ETH1_PHY_INTN signal : it is not done on both MP15 boards as you mentioned, but it's done with MP13 DK board (see ETH1_MDINT and ETH2_MDINT).
This signal is managed by optee and declared as wakeup_pins in pinctrl file (example for MP13) :
wakeup_pin_2: pins2 {
pinmux = <STM32_PINMUX('I', 3, GPIO)>;
};
BR,
Christophe
2024-04-25 06:55 AM - edited 2024-04-25 06:56 AM
Hi @jmglez,
The purpose of ETH1_PHY_INTN is to catch event from PHY (plug/unplug, WoL....)
It is not mandatory to route ETH1_PHY_INTN signal : it is not done on both MP15 boards as you mentioned, but it's done with MP13 DK board (see ETH1_MDINT and ETH2_MDINT).
This signal is managed by optee and declared as wakeup_pins in pinctrl file (example for MP13) :
wakeup_pin_2: pins2 {
pinmux = <STM32_PINMUX('I', 3, GPIO)>;
};
BR,
Christophe
2024-04-25 08:13 AM
Hi Christophe,
thanks for answering my questions.
I guess the example you mentioned gives WoL support on the device, as the PHY interrupt output signal is routed to MPU PI3 with WKUP2 function. I've also checked that the 2nd ETH interface in the MP153 DK board is using ETH2_PHY_INTN AF, which makes sense to me.
In case of MB1263 and MB1272 boards I mentioned at first, in which PHYs interrupt output signals are not routed to PHY_INTN, what is the purpose of connecting PHY's INT signals to those MPU GPIOs? I suppose the MPU Ethernet peripheral wouldn't be abled to catch events from PHY, right?
Best regards,