How can i cange pll clock speed in run time?

aliMesut · ‎2022-04-20

Hi,

I am using stm32mp157c and fixed pll4p (125MHz) clock in dtb.

st,pll@3 {
	reg = <3>;	
	cfg = <3 124 5 5 5 PQR(1,0,0)>;
};

I see that pll4p is fixed (125MHZ )in clk_summury. But i want to change clock speed in run time if my condition become true. Searching this situation in google, i found common clock framework API. But i didn't find any example on stm32mp1. I don't understand stm32mp1 support this framework. How can i dynamically change pll clock speed? Any suggestion?

Best Regards.

Ali Mesut Ince

aliMesut · ‎2022-04-26

Hi,

Do you have any ideas that can help me?

Best Regards.

Ali Mesut Ince