Help me understand why L9733 device does not work

Jesús U · ‎2023-07-25

I am not able to launch SPI activation outputs just using datasheet information. I have tried everything and the status outputs do not change. By making use of an oscilloscope, I have checked that the data bytes transmitted (0xAC01, that would entail an activation of OUT1) through MISO line are correctly sent. Moreover, we have changed SPI mode, frequency, mode of sending the bits…but nothing happens.

I am not able to switch on/off internal mosfets after command byte writing operation. I also read fault register and get 0x0000, which indicates that no fault is present. I do not know if it is a timing issue or something else. I have changed the MCU used to act as a master, but nothing got.

Thanks in advance!

RhSilicon · ‎2023-07-25

@Jesús U wrote:
I am not able to launch SPI activation outputs just using datasheet information. I have tried everything and the status outputs do not change. By making use of an oscilloscope, I have checked that the data bytes transmitted (0xAC01, that would entail an activation of OUT1) through MISO line are correctly sent. Moreover, we have changed SPI mode, frequency, mode of sending the bits…but nothing happens.
I am not able to switch on/off internal mosfets after command byte writing operation. I also read fault register and get 0x0000, which indicates that no fault is present. I do not know if it is a timing issue or something else. I have changed the MCU used to act as a master, but nothing got.
Thanks in advance!

You can find out whether the device operates as a master or slave by looking at the CS or SS pin, if it is input, this device operates as a slave, so the MCU needs to operate as a master.

5.3 Chip select (CS)
This is the chip select input pin.

The datasheet also says it uses 16-bit SPI.

5.6 Input command register

An input byte (16 bits) is routed to the Command Register. The content of this Command
Register is given in Table 10. Additional DI data will continue to be wrapped around the DO
pin. If CS should happen to go high before complete reception of the current byte, this just
transmitted byte shall be ignored (invalid).

https://www.st.com/resource/en/datasheet/l9733.pdf

Jesús U · ‎2023-07-25

It is not a problema with CS either. On the oscilloscope, it can been seen that it is enabled (CS = 0) before the bytes (2 bytes) are transmitted and it is disabled (CS = 1) after the communication, always complying with timing provided in datasheet. I would like to know which are the steps to follow and the key issues in order to activate L9733 outputs. I have taken into account everything that appears in datasheet, but nothing reached. If available, is there any specific driver for this device?

Thank you so much!

raptorhal2 · ‎2023-07-25

Unlike some other SPI devices, this one is LSb first. Check if the problem is as simple as bit sequence.

Jesús U · ‎2023-07-25

I also tried to send LSB first in data chain (16 bits) but nothing happened, as before. It is not a sending sequence issue since all combination have been proved and everything seems okey on oscilloscope.

RhSilicon · ‎2023-07-25

If you can't trigger the outputs, maybe you can at least read the state of the fault register on the outputs. The IC must apply a small current to the output pins to monitor for faults. Maybe you can alternate the state of the outputs so that failures are identified, and the read values are changed, proving that at least the communication is working.

One thing caught my attention, which seems more like an "errata" to me (I hope it's not something to do with ESD vulnerability):

4.4 Drn1-8 susceptibility to negative voltage transients
All outputs connected in the low-side configuration must have a ceramic chip capacitor of
0.01 μF to 0.1 μF connected from drain to ground. This is needed to prevent potential
problems with the device operation due to the presence of fast negative transient(s) on the
drain(s) of the device. Adequate de-coupling capacitors from the Drain (VBAT) to ground
shall be provided for high-side configured outputs.

The MAX232 IC is much more vulnerable to ESD than the MAX3232, and it is very easy to burn the MAX232, so it is important to be careful in this matter.

Jesús U · ‎2023-07-26

Before launching writing operation to the outputs, I can read the next data chain: 0x55 0x55 0x55 0x55. It indicates that all the outputs (1 to 8 are in open load status. After launching communication (0xAC0F) I read again and obtain: 0x55 0x55 0x00 0x00. It means that no fault is present, but I cannot activate the corresponding outputs. It is not also a hardware issue due I have followed the recommendations at placing 0.1uF on low-side outputs and in Vbat supply.

I wonder if CS2SCLK parameter that appears on Figure 6 from datasheet is relevant for communication, in order to activate outputs. If yes, do its time restrictions have to be complied with?

Thank you so much!

RhSilicon · ‎2023-07-26

I wonder if CS2SCLK parameter that appears on Figure 6 from datasheet is relevant for communication, in order to activate outputs. If yes, do its time restrictions have to be complied with?

This is a good observation (CS2SCLK), apparently it is necessary to have a bias circuit (resistive divider) on the DO pin for the time measurement to be disabled, see figure 3 (DO loading for disable time measurement).

Figure 4 might also be interesting to check, it's a pull-up or pull-down resistor, to handle slew rate measurements (I don't know if disabling time measurements via DO (FIG.3) also disables slew rate measurements).

It may be interesting to review chapter 7, Fault Operation, as the settings in table 9 (0xA3 and 0xAA) can affect the diagnostic data (Fault register, table 11).