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STM32MP157 custom board TF-A SDMMC init failed

Badzonor
Associate III

Hello, we are trying to start our custom STM32MP157 board. We encountered some problems that I want to ask about. First is with TF-A, it gets to the SD card init (boot source) and it fails. We have eMMC on MMC2 and it also gives error message.

 

NOTICE:  CPU: STM32MP157DAC Rev.Z
NOTICE:  Model: Zegarson board TF-A testing 0.0.10
ERROR:   stm32_sdmmc2_mmc_init: DT error
ERROR:   SDMMC1 init failed
PANIC at PC : 0x2ffeb8cf

 

What is really weird about that, after some time playing with MMC configs (pull-ups, 1-bit 4-bit wide bus, speed, etc.) it randomly started working and got to DDR init and only then failed.

 

NOTICE:  CPU: STM32MP157DAC Rev.Z
NOTICE:  Model: Zegarson board TF-A testing 0.0.8
NOTICE:  BL2: v2.8-stm32mp1-r2.0(release):v2.8-stm32mp-r2-1-g648de4789-dirty(648de478)
NOTICE:  BL2: Built : 03:58:54, Jul 13 2024
ERROR:   DDR addr bus test: can't access memory @ 0xc0000004
PANIC at PC : 0x2ffeac63

 

But a few days after we made clean build and it again has SD init problem.
What we discovered is that when we bumped final images and compared DTS files converted from DTB, it looks like the version that does not work do not contain sdmmc1 or sdmmc2 configuration, but working one has that.
Please help us what is going on and how to troubleshoot that?

 

Second problem is with STM32DDRFW-UTIL. We configured it for our board and got .stm32 file. 
I flashed first two partitions on SD card with this file instead of tf-a.stm32, LED on PA13 is lit (so boot failure); and of course nothing on UART4. 
Also we tried to use stm32wrapper4dbg on this .stm32 image but it returned an incorrect signature error. Is it only for TF-A or can we use it on STM32DDRFW-UTIL?
Am I flashing it wrong? What should I look for?

 

Thanks!

1 ACCEPTED SOLUTION

Accepted Solutions
Badzonor
Associate III

So, we managed to solve the problem by compiling BL2 TF-A first. Really strange as it should be independent from BL32. Also SP_min does not work and we don't know why, but we switched to OPTEE and it start and gets much much further.

View solution in original post

6 REPLIES 6
DMårt
Lead

@Badzonor 

I'm facing the same problem as you do.

I think you need to configure the .dts files from STM32CubeIDE. They are generated inside the CA7 folder. 

They must be compiled into .dtb files. But I have problems to compile .dts and .dtsi files into .dtb files. 

When .dts files, you can control which pin should be active and which pin should be not active.

 

Default eMMC is eMMC1 for booting. I have too eMMC2 as default, but have not configured it yet. 

 

See this threads:

* Unable to compile .dtb files for U-boot - STMicroelectronics Community

* STM32MP157-DK2 Conversion of DTS to DTB Problem - STMicroelectronics Community

ST32MP1 - CUBEMX Generated dts file , unable to co... - STMicroelectronics Community

 

 

 

 

STM32MP151AAC3 custom board with STM32-OS as operating system: https://github.com/DanielMartensson/STM32-Computer
Badzonor
Associate III

Hello, thank you so much for your reply. We will try that soon and let you know how it goes

Hi, I already edited .dts files from STM32CubeIDE and it looks like its compiles ok. Board name, PMIC config, DDR, PLL and everything else is present in final .stm32 file but the sdmmc is not.

Actually even more concerning is that after I removed sdmmc2 config as it is not essential (booting from sdmmc1 SD card) it still gives error message

ERROR:   stm32_sdmmc2_mmc_init: DT error

I don't know how it is even possible.

 

I also edited binary that is working to DDR init. I changed clock speed and some timing and then it looks like my LPDDR3 works fine 

NOTICE:  CPU: STM32MP157DAC Rev.Z
NOTICE:  Model: Zegarson board TF-A testing 0.0.8
NOTICE:  Bootrom authentication failed
NOTICE:  BL2: v2.8-stm32mp1-r2.0(release):v2.8-stm32mp-r2-1-g648de4789(648de478)
NOTICE:  BL2: Built : 17:38:53, Jul 12 2024
ERROR:   stm32_sdmmc2_read: timeout 1s (status = 201000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = 12,status = 22b000)
ERROR:   stm32_sdmmc2_send_cmd_req: timeout 10ms (cmd = ERROR:

Some other sdmmc2 errors idk why but maybe this will help someway.

 

Thank you, Dominik.

I manage to find out what was causing sdmmc init fail massage. We compiled BL32 (SP_min) before BL2 and this somehow was the reason. Now it gets to BL32 boot. I managed to confirm via SWD that my DDR is in fact working. It holds data without any problem and U-boot is also written. 

NOTICE:  CPU: STM32MP157DAC Rev.Z
NOTICE:  Model: Zegarson board TF-A testing badzonor 0.0.0 200MHz
INFO:    Product_below_2v5=0: HSLVEN protected by HW
INFO:    Reset reason (0x15):
INFO:      Power-on Reset (rst_por)
INFO:    FCONF: Reading TB_FW firmware configuration file from: 0x2ffe2000
INFO:    FCONF: Reading firmware configuration information for: stm32mp_io
INFO:    FCONF: Reading firmware configuration information for: stm32mp_fuse
INFO:    Using SDMMC
INFO:      Instance 1
INFO:    Boot used partition fsbl1
NOTICE:  BL2: v2.8-stm32mp1-r2.0(debug):v2.8-stm32mp-r2-1-g648de4789-dirty(648de478)
NOTICE:  BL2: Built : 03:37:40, Aug  8 2024
INFO:    BL2: Doing platform setup
INFO:    RAM: LPDDR3 32bits 200000kHz
INFO:    Memory size = 0x20000000 (512 MB)
INFO:    BL2: Loading image id 1
INFO:    Loading image id=1 at address 0x2ffff000
INFO:    Image id=1 loaded: 0x2ffff000 - 0x2ffff226
INFO:    FCONF: Reading FW_CONFIG firmware configuration file from: 0x2ffff000
INFO:    FCONF: Reading firmware configuration information for: dyn_cfg
INFO:    FCONF: Reading firmware configuration information for: stm32mp1_firewall
INFO:    BL2: Loading image id 4
INFO:    Loading image id=4 at address 0x2ffc5000
INFO:    Image id=4 loaded: 0x2ffc5000 - 0x2ffd0e98
INFO:    BL2: Skip loading image id 8
INFO:    BL2: Skip loading image id 9
INFO:    BL2: Loading image id 2
INFO:    Loading image id=2 at address 0xc0500000
INFO:    Image id=2 loaded: 0xc0500000 - 0xc0512710
INFO:    BL2: Loading image id 16
INFO:    Loading image id=16 at address 0x2ffc0000
INFO:    Image id=16 loaded: 0x2ffc0000 - 0x2ffc3af7
INFO:    BL2: Loading image id 5
INFO:    Loading image id=5 at address 0xc0100000
INFO:    Image id=5 loaded: 0xc0100000 - 0xc0216368
NOTICE:  BL2: Booting BL32
INFO:    Entry point address = 0x2ffc5000
INFO:    SPSR = 0x1d3

Data Abort at: 0x2ffcd08c DFSR = 0x00000206 DFAR = 0x00000000

We will look how to solve this problem.

Thanks, Dominik.

Badzonor
Associate III

So, we managed to solve the problem by compiling BL2 TF-A first. Really strange as it should be independent from BL32. Also SP_min does not work and we don't know why, but we switched to OPTEE and it start and gets much much further.

may i know where you have done the change and how yoc compiled after changes for ddr 
please help me this one