2025-02-21 03:22 AM
I'm using the Yocto-based OpenSTLinux embedded software on a STM32MP25x and I don't understand which portion of the SRAM1/2 is free to use at runtime.
Aside from the first 4kBytes of the SRAM1 reserved for OTP shadow, can the rest be fully used, or is it also reserved ?
Additionally, in chapter 2.4.2 of the reference manual (RM0457), it states that SRAM1/2 can be accessed through the following address ranges [0x0A04 0000, 0x0A08 0000[, [0x0E04 0000, 0x0E08 0000[, [0x2004 0000, 0x2008 0000[ and [0x3004 0000, 0x3008 0000[. Why are there four physical addresses for SRAM ? Should Cortex-A35 and Cortex-M33 use specific regions to communicate with each other ?
2025-02-21 09:22 AM
Hi @drodr
regarding the 4 possible address ranges to access same memories, this is due to the Cortex-M33 address space split between Code and SRAM and secure/non-secure split done with IDAU.
This allows full flexibility for your secure/non-secure code+data applications in a single set of contiguous memories (need to play with different load and execution address in linker).
Regards