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OPTEE panic in core_init_mmu_map

dkal
Associate III

Hi, I have a custom board with a stm32mp153.  I was able to get past the trusted bootloader and into optee.  It builds the mmu map and then panics when checking it.  I am able to partially step through building the table and the memory starts to get corrupted but I can't see why.  I also have a 157-ev which works fine when I build for that on the same dev machine.  I am looking for possible clues on where to go from here.

1 ACCEPTED SOLUTION

Accepted Solutions

Hi @dkal 

if you are writing to DDR, maybe double check the correct DM Vs DQ/DQS wirings on your schematics. We had seen similar behavior when customers swapped Data Mask and Bytes which mean x32-bits write works but not bytes.

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

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8 REPLIES 8
dkal
Associate III

I've tracked the issue down to memmove not working properly, why would it be fine in stm32mp157 and not fine in stm32mp153?

dkal
Associate III

More specifically, the memmove is filling the destination with garbage even though the source and destination pointers are valid.

dkal
Associate III

It seems that single byte copies are the issue, when it can do a more optimized copy with longs, that memory is correct.  

dkal
Associate III

I am going to assume that this is a RAM issue and am now trying the DDR utility.

Hi @dkal 

if you are writing to DDR, maybe double check the correct DM Vs DQ/DQS wirings on your schematics. We had seen similar behavior when customers swapped Data Mask and Bytes which mean x32-bits write works but not bytes.

Regards.

In order to give better visibility on the answered topics, please click on 'Accept as Solution' on the reply which solved your issue or answered your question.

Thank you, we will check.

We have

DDR_DQM0 connected to UDM

DDR_DQM1 connected to LDM

Hardware guys said they did it that way because thats how the eval board is connected, it looks that way in the schematic, is this correct?

dkal
Associate III

Oh the DQM0 and DQS0 are not consistent with upper and lower.