STPMIC1 on I2C2 breaks ATF? Bug?

[JGuy1]

I'm currently working with the Seed STM32MP1 SoM which has STPMIC1 attached to I2C2. I've been working on setting up a device tree for it, but I've been hitting some bugs. When booting the mainline ATF with my device tree (modified DK2 board, just with the PMIC on I2C2) it worked fine, but I wanted to use UART and the cube programmer so I did the same with the ST v2.2-stm32mp-r1 ATF branch. I hit this error:

PANIC at PC : 0x2ffdd907
 
Exception mode=0x00000016 at: 0x0000d8c3

I narrowed the issue down to a commit which disables clocks based on the boot mode. This code seems to fix it:

diff --git a/drivers/st/clk/stm32mp1_clk.c b/drivers/st/clk/stm32mp1_clk.c
index 5efe343b8..f99c72922 100644
--- a/drivers/st/clk/stm32mp1_clk.c
+++ b/drivers/st/clk/stm32mp1_clk.c
@@ -390,6 +390,10 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 18, UART7_K, _UART78_SEL),
        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 19, UART8_K, _UART78_SEL),
 #endif
+        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 21, I2C1_K, _I2C12_SEL),
+        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 22, I2C2_K, _I2C12_SEL),
+        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 23, I2C3_K, _I2C35_SEL),
+        _CLK_SC_SELEC(N_S, RCC_MP_APB1ENSETR, 24, I2C5_K, _I2C35_SEL),
 
 #if defined(IMAGE_BL32)
        _CLK_SC_FIXED(N_S, RCC_MP_APB2ENSETR, 2, TIM15_K, _PCLK2),
@@ -410,6 +414,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
        _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 0, SPI6_K, _SPI6_SEL),
        _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 2, I2C4_K, _I2C46_SEL),
        _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 3, I2C6_K, _I2C46_SEL),
+
        _CLK_SC_SELEC(SEC, RCC_MP_APB5ENSETR, 4, USART1_K, _UART1_SEL),
        _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 8, RTCAPB, _PCLK5),
        _CLK_SC_FIXED(SEC, RCC_MP_APB5ENSETR, 11, TZC1, _PCLK5),
@@ -428,7 +433,6 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
        _CLK_SC_SELEC(N_S, RCC_MP_AHB2ENSETR, 16, SDMMC3_K, _SDMMC3_SEL),
 #endif
 
-#if defined(IMAGE_BL2)
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL),
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 2, GPIOC, _UNKNOWN_SEL),
@@ -440,9 +444,8 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = {
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 8, GPIOI, _UNKNOWN_SEL),
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 9, GPIOJ, _UNKNOWN_SEL),
        _CLK_SC_SELEC(N_S, RCC_MP_AHB4ENSETR, 10, GPIOK, _UNKNOWN_SEL),
-#endif
-
        _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 0, GPIOZ, _PCLK5),
+
        _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 4, CRYP1, _PCLK5),
        _CLK_SC_FIXED(SEC, RCC_MP_AHB5ENSETR, 5, HASH1, _PCLK5),
        _CLK_SC_SELEC(SEC, RCC_MP_AHB5ENSETR, 6, RNG1_K, _RNG1_SEL),

Giving me this output:

NOTICE:  CPU: STM32MP157CAC Rev.B
NOTICE:  Model: STMicroelectronics STM32MP157C-DK2 Discovery Board
INFO:    Reset reason (0x15):
INFO:      Power-on Reset (rst_por)
INFO:    PMIC version = 0x20
INFO:    Using EMMC
INFO:      Instance 2
INFO:    Boot used partition fsbl1
NOTICE:  BL2: v2.2-r1.0(debug):v2.2-stm32mp-r1-2-g698f4e325
NOTICE:  BL2: Built : 20:05:54, Jul 28 2020
INFO:    Using crypto library 'stm32_crypto_lib'
INFO:    BL2: Doing platform setup
INFO:    RAM: DDR3-DDR3L 16bits 533000Khz
INFO:    Memory size = 0x20000000 (512 MB)
INFO:    BL2 runs SP_MIN setup
INFO:    BL2: Loading image id 4
INFO:    Loading image id=4 at address 0x2ffed000
INFO:    Image id=4 loaded: 0x2ffed000 - 0x2ffff000
INFO:    BL2: Loading image id 5
INFO:    Loading image id=5 at address 0xc0100000
INFO:    STM32 Image size : 870444
INFO:    Image id=5 loaded: 0xc0100000 - 0xc01d482c
WARNING: Skip signature check (header option)
NOTICE:  ROTPK is not deployed on platform. Skipping ROTPK verification.
NOTICE:  BL2: Booting BL32
INFO:    Entry point address = 0x2ffed000
INFO:    SPSR = 0x1d3
PANIC at PC : 0x2fff08a3
 
Exception mode=0x00000016 at: 0xfffffffc

I narrowed this down to some knd of security mechanism. It seems present in mainline but it works there? I worked around it using this patch:

diff --git a/drivers/st/pmic/stm32mp_pmic.c b/drivers/st/pmic/stm32mp_pmic.c
index 07249f607..0d82cd950 100644
--- a/drivers/st/pmic/stm32mp_pmic.c
+++ b/drivers/st/pmic/stm32mp_pmic.c
@@ -471,7 +471,7 @@ static void register_non_secure_pmic(void)
                return;
        }
 
-       stm32mp_register_non_secure_periph_iomem(i2c_handle.i2c_base_addr);
+        /* stm32mp_register_non_secure_periph_iomem(i2c_handle.i2c_base_addr); */
 }

Is this a known bug?

[Olivier GALLIEN · Accepted solution]

Hi @JGuy​ 

Using I2C2 instead of I2C4 for STPMIC is not delivered in default software ST is providing.

But we explain how to do it in following wiki page :

https://wiki.st.com/stm32mpu/wiki/PMIC_hardware_components#Support_in_Cortex-A7_Secure

Hope it help

Olivier