Posted on March 31, 2016 at 16:19
So I haven't got my flash routine working yet on the STM32L476, this time it's another error.
I don't quite understand how this one is possible:
Here the code:
bool
flash_program_buffer(uint64_t* dest,
const
uint64_t* source,
size_t
len)
{
while
(FLASH->SR & FLASH_SR_BSY) {}
// 1. wait until not busy
FLASH->SR = FLASH->SR;
// 2. clear error flags
FLASH->CR |= FLASH_CR_PG;
// 3. set PG bit
for
(
size_t
i=0; i<len; ++i)
{
// 4. write data dword
((uint32_t*) &dest[i])[0] = ((uint32_t*) &source[i])[0];
((uint32_t*) &dest[i])[1] = ((uint32_t*) &source[i])[1];
while
(FLASH->SR & FLASH_SR_BSY) {}
// 5. wait until not busy
if
(FLASH->SR & FLASH_SR_EOP)
// 6. Check EOP flag in FLASH_SR (operation succeeded), and clear it
{
FLASH->SR &= ~FLASH_SR_EOP;
}
// else... ERROR ?
}
FLASH->CR &= ~FLASH_CR_PG;
// 7. clear PG bit if there is no more programming request
return
!(FLASH->SR & FLASH_SR__MASK_ANY_ERROR);
}
Note that preceding the call to that function, the unlock sequence and then a mass erase on that bank are performed.
Now, the address passed as ''dest'' pointer is the very beginning of flash bank 2, 0x08080000.
This looks quite 64-bit aligned to me.
If I understand the manual correctly, I am to write one part of a double-word to a 64-bit aligned address, then write the second part of the double-word. Which is done here.
But after the very first iteration of the loop, the status register has the value 160, i.e. bit5 and bit7 are set:Bit 5, PGAERR: Programming alignment error,Bit 7, PGSERR: Programming sequence error.
What is the cause of this?
Thanks in Advance
#stm32l476-flash
