What is the function of AFIO_EN bit in RCC_APB2ENR?

[sgomes]

Posted on March 09, 2010 at 00:00

What is the function of AFIO_EN bit in RCC_APB2ENR?

[davidwalker9]

Posted on May 17, 2011 at 13:42

Think of the AFIO unit like a GPIO block. It contains a bunch of digital outputs that control multiplexers in the IO blocks to enable the alternate functions. It has to have its clock enabled (like any good GPIO block) in order to enable its access to the bus. The reason it is only on APB2 is because the signals that control the multiplexers don't care which bus the block driving the IO resides. Does this make sense?

[sgomes]

Posted on May 17, 2011 at 13:42

It does make sense.  Looking at the examples in the std periph. lib. however the use of that bit is inconsistent.  It's enabled in some cases but not others.  For example the I2C sample code enables the alternate function for the GPIO pins but does NOT enable the AFIO_EN bit.  The SPI example is the same - alternate functions but NOT the AFIO_EN bit.  Is there a rule somewhere when we are supposed to use this bit?  Is there harm in just enabling it always?

[sgomes]

Posted on May 17, 2011 at 13:42

Can anyone help me?  Pretty please? 🙂

[Tesla DeLorean]

Posted on May 17, 2011 at 13:42

My general opinion on this is to enable it. Basically if you are using alternate functions, or remapping peripheral pins, disabling JTAG, external interrupts or otherwise changing the AFIO registers it needs to be ticking. I seriously doubt it's going to be a huge current suck. But presumably once you're done changing the registers you could turn it off.

From the STM32 Reference Manual, #13902 ''To read/write the AFIO_EVCR,AFIO_MAPR and AFIO_EXTICRX registers, the AFIO clock should first be enabled. Refer to Section 6.3.7: APB2 peripheral clock enable register (RCC_APB2ENR).'' -Clive

[sgomes]

Posted on May 17, 2011 at 13:42

Thanks Clive.  That jives with my suspicion that it had to do with re-mapping.  This also makes dwalker's answer make more sense to me now.  Basically enable it if you are changing any of the AFIO registers shown in Table 52 of the reference manual.

dwalker  -> answers +=1; clive -> answers += 1;