What is the Clock Speed of the SDRAM FMC on the STM32F469?

[C.East2]

Once again I'm struggling to find a clear source for a peripherals clock with STM32 MCU's.

Most searching leads me to HCLK/2, so at a max HCLK of 180MHz I get 90MHz.

However, looking at there reference manual for the STMF469 I see this:

From an example linked here, I can see that the STM32H7B3LI has a divider to select the HCLK Division.

I cannot, however, see this option in MXCube for the STM32F469, but it says that the clock speed could be HCLK/3.

Any idea what's going on here?

[Tesla DeLorean]

Perhaps a deficiency in CubeMX, or looking in the wrong place. Or that 90 MHz is already under the typical 100, 133, or 166 MHz rated SDRAMs of the day, and you're likely not using 66 MHz parts.

[C.East2 · Accepted solution]

Correct. I've found the divider in question, which CubeMX calls 'SDRAM common clock' which seems obvious but the parameter is of type 'HCLK clock cycles' where there selectable options are '2/3 HCLK clock cyles' when it's really a prescaler. This really needs to be made clearer.

[Tesla DeLorean]

I'm not sure it is a prescaler, the peripheral is a complex sequencer, it's running at HCLK internally.

[C.East2]

I get it doesn't prescale the HCLK for the whole peripheral, but certainly it scales the HCLK down to the SDCLK. Either way having the parameters in terms of 'HCLK Cycles' seems a wrong way of defining an output clock, would you agree?