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what is port output speed in STM32

Associate III


I'm looking for some answer which I can not find anywere.

What is the time between instruction execution time consisting of writing '1' to GPIO->BSRR of any pin and port and real mcu pin state in case when HCLK is e.g. 72MHz and APB2 is 4,5MHz (APB2 prescaler is 16).

(F1  series is just example)



Not sure it is defined. The processor is pipeline and the write buffers delay/defer the operation. Depends if GPIO is on AHB or APB.

Why so slow on the APB?

Could perhaps read a pin state via IDR and then post to ODR/BSRR, drive externally with square wave and measure phase shift.

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>>Why so slow on the APB?

This was only as an example to show that this two buses are clocked in different speed, because if they would have the same clock speed it would be is easier to understand,