cancel
Showing results for 
Search instead for 
Did you mean: 

What happens when you press reset?

Vmere.1
Senior

I know when we press the reset in keil or when reset happens the PC should start at 0x000...

ideally in my projects and flash is remapped to the start address.

But for me when I press reset it is going somwhere to 0x1ffff some stupid thing.

0693W00000SvvCKQAZ.pngAnd I'm unable to debug. Can some one help me here?

3 REPLIES 3

The 0x1FFxxxxxx space is ROM

The SCB->VTOR resets to ZERO, and then whatever maps into the zero page address space dictates where it goes from there. ie ROM, FLASH or RAM, selectively

The PC doesn't start at zero

The Initial SP and PC values are loaded from the first two records in the vector table. Perhaps review a technical reference manual for the core?

The zero mapping is dictated primarily via the BOOTx pins, and remapping register, typically in the SYSCFG unit.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..

Thank you for revisiting this information for me. But this is a old project and it is working one. Already in market and it contains one bootloader which jumps to application which is located at 0x0800 1000

Is it possible that the MCU is not powered properly and the boot pins are not in state, which is then switching to ROM upon startup?

Depend on the device, different STM32 have different nuances.

BOOT0 pin should be pulled LOW for normal operation, designs that float it are prone to failure. Tends to look like not running your code/application, but MCU is running.

Synchronous logic design need proper POR circuits, random R-C circuits are prone to all types of problems, especially for supplies with low rise, and fall times. Effective designs tend to have laser trimmed devices that threshold, and ideally clamp for 100's of milliseconds.

Some of the newer devices boot via ROM and check the FLASH vectors before transferring control. These are designed to look at 0x08000000 and perhaps 0x08100000 for viable data, and not 0xFFFFFFFF erase patterns.

The H7 devices have different Power-On vs NRST behaviour, this relates to pulling Option Bytes and preventing glitching attacks. Once it decides it wants to boot from ROM you'll need to power cycle to clear this. Also some L4+ devices do similar things.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..