VDDA vs. VDD Seperate Supplies

[cnicolls2]

Posted on January 08, 2009 at 16:33

VDDA vs. VDD Seperate Supplies

[cnicolls2]

Posted on May 17, 2011 at 12:17

I am trying to wade through the power supply requirements regarding VDDA vs. VDD for STM32 and I'm unclear on a few things:

1) AppNote 2834 (http://www.st.com/stonline/products/literature/an/15067.pdf) recommends using 2 seperate supplies, 1 for VDD and 1 for VDDA to minimize the effect of power supply noise influencing ADC measurements. Further more it shows a diagram of seperate supplies, a SMPS for VDD and a linear (from the SMPS) powering VDDA. 2) The latest STM32F103 medium-density datasheet (http://www.st.com/stonline/products/literature/ds/13587.pdf) states ''It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation.''. These two are contradictory. The datasheet implies that seperate supplies must track eachother during startup to ensure the 300mV delta. That sequencing can add design complexity to the power system, something I'm not sure I want to do for a low-cost system. Reading another post, and looking at the datasheet, I *think* the tracking is because the PLL and reset circuitry are connected to VDDA only. That being the case, I'm wondering if it's OK to play it loose on the tracking during power-up, as long as a valid reset pulse is externally applied to the chip after all supplies have reached stability. Does anyone have any further insight on this? I'd appreciate it if an apps engineer or ST rep could comment on the potentially contradcitory info of the documentation and set me straight on the real requirements. Thanks in advance, Chris

[brunoalltest]

Posted on May 17, 2011 at 12:17

I´m intrigued about this matter too. But the diagram of AN2834 don´t contradict the datasheet. The linear regulator will track de SMPS.

I use a olimex boards with STM32F103RB(64 pins) and my readings with the ADC is very poor(lots of noise). On the last couple of days, I´ve read the STM32 documentation and forums a lot, looking for a way to achieve low noise on the measurements. I´ve also checked the schematics of many STM32 boards with 64 pins microcontrollers. They 1) Connect VDD and VDDA with a LC filter (Olimex, IAR, Etteam) 1) Connect VDD and VDDA with a RC filter (Keil, Hitex) In the forums, I´ve found only two people claim that they achieved low noise with stm32. Dir on this

http://www.st.com/mcu/forums-cat-6113-23.html&start=10

, said it was easy with STM32F103VB(100 pin). He also said he could achieve low noise with STM32F103C8(48 pin) using a shunt voltage reference to power VDDA. And ThomasScherrer on this

http://www.stm32circle.com/forum/viewtopic.php?id=161

said he could achieve low noise STM32F10F10X-128K-EVAL board(mcu with 100 pin). So, so far... only dir achieved low noise with a >= 64 pins stm32. And I´m leaning to try his experiment but I will need to make my own board.

[obtronix]

Posted on May 17, 2011 at 12:17

There are things you can try to narrow down the problem with your board.

Did you look at the noise on the VDDA input on a scope? Does it agree with the noise you seeing with the converted values? Did you try converting with the core shut off? (if this helps then the VDD to VDDA filtering is not adequate, or the board has layout issues) How are you powering the Olimex boards? (I'm not familar with them, does it have a linear regulator, if so try powering it directly with a battery) Take 4096 samples, then do an FFT of the data (Excel has a built in FFT function you can use easily), this will tell you the frequency the noise (CPU clock, USB, PSU switcher (if any), 60Hz power line, the fluorescent light bulb at your workstation, whatever), that should help you narrow down the problem. My scope has an incredibly noisy switcher power in it and when I move it close to an unsheilded board I see the switcher frequency in the A/D readings! [ This message was edited by: obtronix on 08-01-2009 15:50 ]

[brunoalltest]

Posted on May 17, 2011 at 12:17

>Did you look at the noise on the VDDA input on a scope? Does it agree with the noise you seeing with the converted values?

The scope investigation is not an option, my scope is noisy by itself. Just shortcutting the probe with its own ground shows a lot show noise on the LCD.

>How are you powering the Olimex boards? (I'm not familar with them, does it have a linear regulator, if so try powering it directly with a battery)

I usually power the board with the USB, but I´ve tried to power it with a battery and the improvement was minimal. The

http://www.olimex.com/dev/images/ARM/ST/STM32-H103-sch.gif

of

http://www.olimex.com/dev/stm32-h103.html

looks good. It uses a linear regulator, filters and only one connection(R14 on the bottom) of the analog and digital grounds. The layout also looks good, the LC filter is near the VDDA pin.

>Take 4096 samples, then do an FFT of the data (Excel has a built in FFT function you can use easily), this will tell you the frequency the noise (CPU clock, USB, PSU switcher (if any), 60Hz power line, the fluorescent light bulb at your workstation, whatever), that should help you narrow down the problem.

I´ve already tried the FFT on matlab, but the noise is well spread all over the spectrum, meaning random noise, or at least above my sample rate wich is usually between 5kHz and 60kHz.

>Did you try converting with the core shut off? (if this helps then the VDD to VDDA filtering is not adequate, or the board has layout issues)

I will try that. Any hints how to that?

[obtronix]

Posted on May 17, 2011 at 12:17

Set up the ADC and DMA engine for continuous conversion and circular buffer, put the core to sleep set to wait up from a timer or a push button (if your board has a button connected to PA0 or something), then add code that immediately stops the ADC after wake up.

The broadband noise your seeing is not a good sign.

[cnicolls2]

Posted on May 17, 2011 at 12:17

''The linear regulator will track de SMPS. '' - maybe, maybe not. The linear regulator will have some finite drop-out voltage. So the linear's input voltage must be greater than VDD if VDDA is to achieve the same level as VDD (whew, a mouthful). In that case, the dual output SMPS would need to be internally synchronized to achieve this proper tracking.

Irregardless, does anyone have any further thoughts on my original post? Different supplies for VDDA and VDD as opposed to a single VDD/VDDA source? Preferences, experiences, etc...? Thanks, Chris