Greetings,
I am working with the STM32U585RI and a sensor that asserts an interrupt on the MISO line. I would like to know whether this setup is feasible, and if so, how best to implement it.
One approach I have considered is to use a separate pin (LPGPIO) to monitor the interrupt condition and then trigger the SPI sequence. However, during ongoing SPI transactions, I would need to temporarily disable the interrupt feature and re‑enable it after each transaction.
My question is, how can this be achieved using LPBAM? Is there a recommended way to configure LPBAM so that the interrupt handling and SPI transfers can coexist without conflict? Any suggestions or guidance would be greatly appreciated.
Best regards,
Rasool
