Understanding the purpose of ADC_SMPR

dimax · ‎2013-10-12

Posted on October 13, 2013 at 06:46

Hi,

I'm trying to understand what the ADC_SMPR register is used for.

According to Reference Manual we have following control on the ADC conversion time:

ADC_CR1 Register:

Bits 25:24 RES[1:0]: Resolution

These bits are written by software to select the resolution of the conversion.

00: 12-bit (15 ADCCLK cycles)

01: 10-bit (13 ADCCLK cycles)

10: 8-bit (11 ADCCLK cycles)

11: 6-bit (9 ADCCLK cycles)

But we still have ADC_SMPR 1/2:

Bits 26:0 SMPx[2:0]: Channel x sampling time selection

These bits are written by software to select the sampling time individually for each channel.

During sampling cycles, the channel selection bits must remain unchanged.

Note: 000: 3 cycles

001: 15 cycles

010: 28 cycles

011: 56 cycles

100: 84 cycles

101: 112 cycles

110: 144 cycles

111: 480 cycles

I understand that CR1 defines a minimal number of ADC clocks required for conversion while SMPR defines actual number of clocks that core will use. If my assumption is correct I want to understand how the extra clocks are used. Is it a simple delay and if yes is conversion done at the beginning or at the end of SMPR interval? If this time is used for better sampling or holding please tell us how and what is the precision improvement with a number of conversion clocks increase?

Thanks.

dash-spam · ‎2013-10-13

Posted on October 13, 2013 at 14:05

In other words

this is

the time during

the input voltage

is measured.

dimax · ‎2013-10-13

Posted on October 13, 2013 at 15:05

According to specification 15 cycles is enough. Why in this case should I take more? And if I take more what are the improvements?

dimax · ‎2013-10-13

Posted on October 14, 2013 at 06:15

Will I get any information about purpose of ADC_SMPR register? I'm asking ST representatives here in forum.

Why should I guess !!! This information has to be in Reference Manual and if it is not where at least provide it here please.

frankmeyer9 · ‎2013-10-14

Posted on October 14, 2013 at 09:10

I'm asking ST representatives here in forum.

Why should I guess !!!

ST staff is rarely present here.

This information has to be in Reference Manual and if it is not where at least provide it here please.

I don't think so.

This is general electronics stuff. Search for some article about the principles of successive aproximation ADCs. ''Sampling time'' is a narrow defined term in this context.

Why should ST repeat all the basics in the reference manuals ?

waclawek.jan · ‎2013-10-14

Posted on October 14, 2013 at 09:43

Sampling time is needed to charge the sample-and-hold capacitor from the measured source through the multiplexer (multiplexer's resistance). If you want to measure the output of a signal source with significant internal resistance, you need to give time to this capacitor to charge. This is dealt with in the respective chapter of the datasheet, there is even a formula giving the maximum external input impedance in terms of number of sampling periods defined in the ADC_SMPRx register. Note, that this sampling time is settable per input channel, thus you can have signal sources with different internal resistance.

JW