2025-08-02 6:35 AM
Hello.
I am using STM32F745 to write to FLASH, but the write fails and the ERSERR flag is set.
However, this ERSERR flag is
*(__IO uint32_t*)0x080C0000 =data; /* (4) */
*(__IO uint32_t*)(0x080C0000+4) =data2; /* (4) */
If you comment out this part, it will not set.
Why does the flag not set during erase operations, which should cause an erase error, but instead set during write operations?
By the way, when only FLASH unlock and FLASH erase operations are performed, the selected sector is erased normally.
I am seeking a solution to ensure that write operations to FLASH are performed normally.
#define FLASH_SR_BSY (1 << 16)
#define FLASH_SR_EOP (1 << 0)
#define FLASH_CR_LOCK (1 << 31)
#define FLASH_CR_SER (1 << 1)
#define FLASH_CR_SNB (0x7 << 3)
#define FLASH_CR_STRT (1 << 16)
#define FLASH_CR_PG (1 << 0)
#define FLASH_CR_PSIZE (0x3 << 8)
void FLASH_UNLOCK(){
while ((FLASH.SR & FLASH_SR_BSY) != 0);
if ((FLASH.CR & 0x80000000) != 0)
{
FLASH.KEYR = 0x45670123;
FLASH.KEYR = 0xCDEF89AB;
}
}
void FLASH_DELETE(){
while ((FLASH.SR & FLASH_SR_BSY) != 0);
FLASH.CR |= FLASH_CR_SER;
FLASH.CR |= FLASH_CR_SNB;
FLASH.CR |= FLASH_CR_STRT;
while ((FLASH.SR & FLASH_SR_BSY) != 0);
FLASH.CR &= ~FLASH_CR_SER;
}
void FLASH_Write(uint32_t address, uint32_t data, uint32_t data2){
while ((FLASH.SR & FLASH_SR_BSY) != 0);
FLASH.CR |= FLASH_CR_PSIZE;
FLASH.CR |= FLASH_CR_PG;
*(__IO uint32_t*)address =data;
*(__IO uint32_t*)(address+4) =data2;
while ((FLASH.SR & FLASH_SR_BSY) != 0);
FLASH.CR &= ~FLASH_CR_PG;
}
int main(){
__asm volatile ("cpsid i");
FLASH_UNLOCK();
FLASH_DELETE();
FLASH_Write(0x080C0000,0x00000002,0x00000064);
__asm volatile ("cpsie i");
}
2025-08-02 6:50 AM
Use ISB, DSB to ensure operations are done before moving on, as HAL does.
Also consider using the standard CMSIS header files rather than redefining everything yourself.