Uart : what is the difference between IDLE and RTO interrupts

[JulienD]

Hello,

Can I say that "IDLE" is equivalent to "RTO with 8-10 bits (depending on framing)"?

Or are there some other subtle differences?

My goal is to transfer received data with DMA and start interpretation of the data when nothing is received on the line which, in my application's world, is equivalent to an end of frame.

Thanks

Julien

[Muhammed Güler · Accepted solution]

 There is a good explanation here

https://github.com/MaJerle/stm32-usart-uart-dma-rx-tx

[Pavel A.]

Short answer: RTO is what you want to use. IDLE is what you don't want, if RTO is available.

[JulienD]

Thanks for your answer, it's exactly what my experiments lead me to understand.

Delay is the only difference between RTO and IDLE.

[Pavel A.]

No, delay is not the only difference between RTO and IDLE.

The IDLE condition occurs when the UART receives the "idle frame". So when the RX line is silent and IDLEIE set, the UART will continuously generate IDLE interrupts. RTO timeout starts counting after at least one data byte is received (after its stop bit TL;DR); it won't occur just when RX line is silent. Easier to manage. This is the behavior you actually want (and the reason why this feature exists at all).

The IDLE detection serves also another purpose, to wait for opportunity to transmit when multiple devices share the comm line or wait until noise disappears.

[######]

Apologies about reviving an old thread / post...

I just wanted to query this statement:

---

@Pavel A. wrote:

The IDLE condition occurs when the UART receives the "idle frame". So when the RX line is silent and IDLEIE set, the UART will continuously generate IDLE interrupts.

---

If the IDLE bit within the status register is cleared with a proper sequence (micro dependent) then I don't believe it will continuously interrupt at all.

This is detailed for example in the STM32F4 RM090 USART_SR

Bit 4 IDLE: IDLE line detected
This bit is set by hardware when an Idle Line is detected. An interrupt is generated if the
IDLEIE=1 in the USART_CR1 register. It is cleared by a software sequence (an read to the
USART_SR register followed by a read to the USART_DR register).
0: No Idle Line is detected
1: Idle Line is detected
Note: The IDLE bit is not set again until the RXNE bit has been set itself (a new idle line
occurs).

Similar in the STM32H7 Ref Manual RM0399 (which also has RTO) USART_ISR

Bit 4 IDLE: Idle line detected
This bit is set by hardware when an Idle Line is detected. An interrupt is generated if
IDLEIE = 1 in the USART_CR1 register. It is cleared by software, writing 1 to the IDLECF in
the USART_ICR register.
0: No Idle line is detected
1: Idle line is detected
Note: The IDLE bit is not set again until the RXFNE bit has been set (i.e. a new idle line
occurs).
If Mute mode is enabled (MME = 1), IDLE is set if the USART is not mute (RWU = 0),
whatever the Mute mode selected by the WAKE bit. If RWU = 1, IDLE is not set.

Is there a part or family that does not exhibit this behaviour?

TIA.