UART interrupt not received after some time and ORE bit is high

[vchau.2]

Hi All,

My application sends and receive data very frequently, Some times Tx and Rx may be occur same time, Application run for some time (10 sec or 20 sec) but after some time Rx interrupts stop working and i found ORE bit high.

So My question is

1. What happen when Tx and Rx occur at same time (Tx blocking mode and Rx in interrupt mode)
2. How to clear ORE bit it goes high

[Tesla DeLorean]

There's no reason RX and TX can't occur concurrently.

If your IRQ Handlers block for more than a byte time, you'll likely run into issues. Have them buffer data, and have whatever parsing/processing done somewhere else, that doesn't have tight time constraints.

Overruns occur if you are not attentive to hard deadlines.

Depends on the model of STM32, the Reference Manual should describe how to clear, and which register to use.

[waclawek.jan]

Which STM32?

> How to clear ORE bit it goes high

This is why it's important to tell, which STM32. There are 2 different UART modules in the various STM32 and the procedure is different too - but in any case, it's in the RM, so it's enough to read it and follow it.

 

So, check in the RM for *your* STM32.

JW

[Karl Yamashita]

More than likely you don't check for HAL status when you call HAL_UART_Receive_IT. If it returns HAL_BUSY then the interrupt isn't enabled.

If that is the case, then check this post that i replied to https://community.st.com/s/question/0D53W000022Hi9ySAC/stm32-hal-uart-receive-interrupt-stops-receiving-at-random-times

[vchau.2]

Thanks for your answers,

As per data sheet USART is full duplex, I want to know if There is single register for Tx and Rx that is DR register, how can be full duplex, What else if Tx and Rx occur at a same time?

[Tesla DeLorean]

Its not a memory, the receive and transmit registers can exist at the same address, but there are two independent data paths and registers. The operate independently and concurrently.