Posted on May 17, 2011 at 13:59First of all, thks for your quick response.
What is your sysclk frequency? 72MHz
What is the measured frequency?Timer Frecuency: 2KHz
TIM1_Prescaler: 3600 (3599+1)
TIM1_Period: 1
TIM1_RepetitionCounter: 4
What is the calculated frequency? I Don´t understand
What is the complete timer initialization code?
/* =============================================================================
* Function Name : CLK_configuration
* Description : Configuración del Nested vectored interrupt.
============================================================================= */
void CLK_configuration (void)
{
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ HSI RC (8 MHz) ~~~~ */
RCC_HSICmd(ENABLE); /* ENABLE/DISABLE RCC_CR.HSION */
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY) == RESET); /* WAIT TO HARDWARE OFF */
RCC_SYSCLKConfig(RCC_SYSCLKSource_HSI); /* MODIFICA RCC_CFGR.SW */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ HSE_Value (8 MHz) stm32f10x_conf.h ~~~~ */
RCC_HSEConfig(RCC_HSE_ON); /* ON/OFF RCC_CR.HSEON */
while(RCC_GetFlagStatus(RCC_FLAG_HSERDY) == RESET); /* WAIT TO HARDWARE OFF */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ PHASE LOOP LOCKED PLLCLK->72MHz ~~~~ */
RCC_PLLConfig(RCC_PLLSource_HSE_Div1,RCC_PLLMul_9); /* RCC_CFGR.PLLSRC=1, RCC_CFGR.PLLXRPRE=0 y RCC_CFGR.PLLMULL=0111 */
RCC_PLLCmd(ENABLE); /* ENABLE/DISABLE RCC_CR.PLLON */
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET); /* WAIT TO HARDWARE OFF */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ SYSTEM CLOCK SYSCLK=72MHZ HCLK=72MHZ ~~~~ */
RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5); /* 72MHz/1.5=48MHZ */
RCC_ADCCLKConfig(RCC_PCLK2_Div8); /* CONFIGURE RCC_CFGR.ADCPRE */
RCC_PCLK2Config(RCC_HCLK_Div1); /* CONFIGURE RCC_CFGR.PPRE2 APB2 PCLK2=72MHz */
RCC_PCLK1Config(RCC_HCLK_Div2); /* CONFIGURE RCC_CFGR.PPRE1 */
RCC_HCLKConfig(RCC_SYSCLK_Div1); /* CONFIGURE RCC_CFGR.HPRE */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ EMB_FLASH ~~~~ */
#ifdef EMB_FLASH
// 5. Init Embedded Flash
// Zero wait state, if 0 < HCLK 24 MHz
// One wait state, if 24 MHz < HCLK 56 MHz
// Two wait states, if 56 MHz < HCLK 72 MHz
// Flash wait state
FLASH_SetLatency(FLASH_Latency_2);
// Half cycle access
FLASH_HalfCycleAccessCmd(FLASH_HalfCycleAccess_Disable);
// Prefetch buffer
FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
#endif // EMB_FLASH
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
// 5. Clock system from PLL
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); /* MODIFICA RCC_CFGR.SW */
}
/* =============================================================================
* Function Name : TIMER_configuration
* Description : Configuración del TIMER.
============================================================================= */
void TIMER_configuration(void)
{
TIM1_TimeBaseInitTypeDef TIM1_TimeBaseInitStruct;
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ TIM1 INIT ~~~ */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1,ENABLE); /* RCC_APB2ENR.TIM1EN ENABLE CLK TIM1 */
RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1,DISABLE); /* RCC_APB2RSTR.TIM1RST RESET TIM1 */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ CONFIGURACION TIM1 ~~ */
#define Prescala 3600 /* Maximo 65536 */
#define Periodo 1 /* Maximo 65536 */
#define Repeticion 5 /* Maximo 256 */
TIM1_TimeBaseInitStruct.TIM1_Prescaler = Prescala-1; /* PRESCALER TIMx_PSC */
TIM1_TimeBaseInitStruct.TIM1_CounterMode = TIM1_CounterMode_Up; /* TIM1_CR1.DIR */
TIM1_TimeBaseInitStruct.TIM1_Period = Periodo; /* PERIOD TIMx_ARR */
TIM1_TimeBaseInitStruct.TIM1_ClockDivision = TIM1_CKD_DIV1; /* TIM1_CR1.CKD */
TIM1_TimeBaseInitStruct.TIM1_RepetitionCounter = 0; /* TIM1_RCR */
TIM1_TimeBaseInit(&TIM1_TimeBaseInitStruct); // Clear update interrupt bit
TIM1_ClearITPendingBit(TIM1_FLAG_Update); // Enable update interrupt
TIM1_ITConfig(TIM1_FLAG_Update,ENABLE); // Enable timer counting
TIM1_Cmd(ENABLE); }
