TIM15 can be synchronized with TIM16

juvf · ‎2013-10-27

Posted on October 28, 2013 at 03:58

Why synchronize TIM15 with TIM16?

CPU: STM32F100C8T6

From datasheet (Doc ID 16455 Rev 3) ''TIM15 can be synchronized with TIM16 and TIM17.''

From STM32F10xxx Reference manual:

''14.5.3 TIM15 slave mode control register (TIM15_SMCR)

Bits 6:4 TS[2:0]: Trigger selection

This bitfield selects the trigger input to be used to synchronize the counter.

010: Internal Trigger 2 (ITR2)

011: Internal Trigger 3 (ITR3)

100: TI1 Edge Detector (TI1F_ED)

101: Filtered Timer Input 1 (TI1FP1)

110: Filtered Timer Input 2 (TI2FP2)

See Table 63: TIMx Internal trigger connection on page 337 for more details on ITRx meaning

for each Timer.

...

Table 63. TIMx Internal trigger connection(1)

Slave TIM

ITR2 (TS = 010) ITR3 (TS = 011)

TIM15 TIM16 TIM17

1. When a timer is not present in the product, the corresponding trigger ITRx is not available.''

But in register CR2 of TIM16 is not MMS bits, and I can not assign update event as trigger output (TRGO). Why assign TRGO in TIM16/17?

waclawek.jan · ‎2013-10-28

Posted on October 28, 2013 at 12:27

I'd say, it's similar than the TIM12/TIM13 discussed in https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FAN4013%20%20RM0313%20contradict%20about%20Timer%20Features&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&c...

I maintain what I said there: the timers' chapters in the manuals are a mess.

[EDIT] AN4013 appears to support this: in table 3, both the ''1-channel'' (as is TIM13 in the linked thread) and ''1-channel with one complementary output'' (*) are marked as ''Master config - Yes (OC signal)'', which hints that for these timers, instead of setting explicit source of TRGO, the ''regular'' output channel works as the master output signal.

Now that the same AN4013 says TIM15 is ''1-channel with...'' and TIM16/TIM17 are ''2-channel with...'', while according to the RM it's the other way round - that's just part of the mess I am talking about... Not to mention the diagrams containing explicit TRGO output from the trigger block in the RM... :( [/EDIT]

JW