Hello, STM32 community,
I’m currently working with the STM32U5 and using the DCMI (Digital Camera Interface) to interface with a ADC Module which has a pixel clock and outputs 14-bit parallel data. While I understand that the DCMI supports extended data modes up to 14 bits, I wanted to clarify if the DCMI FIFO in the STM32U5 can handle the full 14-bit data width (D0–D13) in high-speed operations.
In some documentation(AN5020) and block diagrams, it appears the 4-word FIFO on dcmi might only be used for 12-bit data (D0–D11). However, for my project, I need to confirm if the FIFO can manage the additional 2 bits for 14-bit mode without causing overflow or data loss during DMA transfers.
Can anyone confirm if the STM32U5 DCMI 4 WORD FIFO fully supports 14-bit parallel data in DCMI extended data mode, or are there any limitations I should be aware of?
Thank you for your help!
Regards
JAYAPRAKASH P
AKTIS ENGINEERING SOLUTION
