Hi
Using STM32 Cube MX, I can select a data bus of 32 bits for PSRAM (FMC interface) on STM32F723IEKx MCUs. however I do not see a list of supported transactions for such a bus in the paragraph "12.5.2 Supported memories and transactions" in the RM0431 document.
from the description in previous paragraphs, I guess that:
-Synchronous Read and write of 32 bits data on AHB generate 32 bits R/W accesses
-Synchronous Read of 8 and 16 bits data on AHB generate 32 bits read access
-Synchronous Write of 8 and 16 bits data on AHB generate 8 and 16 bits writes on PSRAM using byte lanes pins
Is my guess correct? can you please confirm it.
Kind Regards
