cancel
Showing results for 
Search instead for 
Did you mean: 

STM32U575/585 MSIS calibrated by LSE question

JoshA
Associate

If the LSE 32.768KHz crystal is disturbed after the system starts with MSIS auto calibration, and the MSIS clock is used by the PLL for the SYSCLK, the frequency of SYSCLK loses its 0.25% accuracy and starts to drift.

Is there any register or interrupt that can be used to detect this situation (MSI_PLL_UNLOCK and LSECSS not available for Rev X - RM0456 Table 184 & 187), and if so, what steps can re-setup the clock to be auto calibrated once again?

I can simulate it by touching the LSE crystal when it is running, the SYSCLK changes from 159.91Mhz (stable) to about 161.59 - 161.2 (unstable), even though the 32.768khz returns to being stable after the disturbance.

I am currently evaluating using both the NUCLEO-U575ZI-Q board and the B-U585I-IOT02A board, both with Rev X parts fitted. Is Rev X currently in production, or is there a newer/fixed revision available?

1 ACCEPTED SOLUTION

Accepted Solutions
Billy OWEN
ST Employee

Hi @JoshA 

 

This post has been escalated to the ST Online Support Team for additional assistance.  We'll contact you directly.

 

Regards,

Billy

View solution in original post

1 REPLY 1
Billy OWEN
ST Employee

Hi @JoshA 

 

This post has been escalated to the ST Online Support Team for additional assistance.  We'll contact you directly.

 

Regards,

Billy