We have a circuit using an STM32L552RC where we want to measure the VDD rail (3V3) against the external voltage reference.
Externally the VBAT pin is connected to the 3V3 rail, the same as VDD.
To our understanding, setting the CH18SEL bit of ADC_CCR would have been enough to measure VDD/3 from channel 18 of the ADC1, but it is reading a much lower figure that is not steady also.
According to Figure 160 of the reference (see attached image) looks like setting CH18SEL wires the "analog switch" connected to the PIN.
Is this assumption correct? If the assumption is not correct, is there a workaround?
Our product use cases don't include any low power modes or battery backup, we only want to monitor VDD with that line.
Currently, we are doing other measurements with ADC1 and ADC2 working alright, including measuring the external vref against vrefint using channel 0 of ADC1.
Thanks in advance.
Kind regards,
Daniel.
