STM32L476 SAI2 block B not working!

delphi · ‎2016-07-18

Posted on July 18, 2016 at 20:01

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delphi · ‎2016-07-18

Posted on July 18, 2016 at 20:04

Please notice that debug was OK

Codec is initiliased using the I2C good and then all callbacks was ok to start IT.

Next day I can check signals with logic analyzer.

But know it is late bacause it is a software bug (or feature) of current HAL libary with the latest MX for L series

delphi · ‎2016-07-19

Posted on July 19, 2016 at 11:44

Also notice the block B on SAI1 is working! I created an another tests and shoose different pins from B block. Anything was ok.

delphi · ‎2016-07-19

Posted on July 19, 2016 at 16:43

Seems to be no answers. Then I created the support ticket and no answer too.

Too bad to understand how boring is the stm32 development.

delphi · ‎2016-07-19

Posted on July 19, 2016 at 20:12

I attached 2 files.

In non working example with SAI2 you can see only MCLK and SCK.

Another signals seems to be no (logic one everwhere).

But in another picture with standard example everything is ok

delphi · ‎2016-07-19

Posted on July 20, 2016 at 08:24

Logic one - for I2C and reset - this is normal

But other important lines are zero!

delphi · ‎2016-07-21

Posted on July 21, 2016 at 09:51

Sorry. In the first message I gave an incorrect info about block B of SAI1. It is not working too with the same thing described in picture! You can see only near 700KHz bit clock signal and 6 Mhz input clock signal for codec. Codec init was succes on I2C but then the same situation is here too.

delphi · ‎2016-07-21

Posted on July 21, 2016 at 09:58

For B block tests I redefine the definitions in example to SAI:

#define AUDIO_SAIx SAI1_Block_B

#define AUDIO_SAIx_CLK_ENABLE() __HAL_RCC_SAI1_CLK_ENABLE()

#define AUDIO_SAIx_FS_GPIO_PORT GPIOB

#define AUDIO_SAIx_FS_AF GPIO_AF13_SAI1

#define AUDIO_SAIx_FS_PIN GPIO_PIN_6

#define AUDIO_SAIx_SCK_GPIO_PORT GPIOB

#define AUDIO_SAIx_SCK_AF GPIO_AF13_SAI1

#define AUDIO_SAIx_SCK_PIN GPIO_PIN_3

#define AUDIO_SAIx_SD_GPIO_PORT GPIOB

#define AUDIO_SAIx_SD_AF GPIO_AF13_SAI1

#define AUDIO_SAIx_SD_PIN GPIO_PIN_5

#define AUDIO_SAIx_MCLK_GPIO_PORT GPIOB

#define AUDIO_SAIx_MCLK_AF GPIO_AF13_SAI1

#define AUDIO_SAIx_MCLK_PIN GPIO_PIN_4

#define AUDIO_SAIx_MCLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()

#define AUDIO_SAIx_SCK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()

#define AUDIO_SAIx_FS_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()

#define AUDIO_SAIx_SD_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()

delphi · ‎2016-07-21

Posted on July 21, 2016 at 10:12

I also cann't understand why I cann't choose the block B in cubeMX software to choose the master mode with clock output?

delphi · ‎2016-07-21

Posted on July 21, 2016 at 10:54

To solve this problem I am downloading the cube mx and it is clear for me now that there is one feature not clear describe in docs. You must shoose the another dma channel. For B block - the 2nd or 7th of DMA2