STM32L431 COMP erratum

[Johannes Trepte]

Posted on April 05, 2017 at 12:04

On the STM32L431, there's an erratum described in STM32L431xx Errata sheet (STM32L431xx device limitations / DM00218224). It allows to reset COMP1 and COMP2 despite of the LOCK bit being set.

My question: What happens to an I/O pin that is connected to the COMP's output via the alternate function multiplexer / GPIOx_AFR? Will it switch to a defined state? If so, to which state?

#comp-erratum

[Amel NASRI]

Posted on April 05, 2017 at 16:03

Hello

trepte.johannes

‌,

Setting SYSCFGRST will restSYSCFG + COMP + VREFBUF, so it has no impact on GPIO registers even if the pin is configured in AF mode to be used as Comp output.

-Amel

[Johannes Trepte]

Posted on April 05, 2017 at 16:37

Hello Amel,

thanks for your quick response.

I understand that SYSCFGRST will not change GPIO registers.

But what about the voltage at the pin itself? The GPIO pin remains configured as an alternate function, connected to the COMP peripheral, which itself will be reset. What information will the COMP output pass to the GPIO driver?

• Always 0?
• Always 1?
• Unchanged?
• Undefinded?

This information would be important for me in order to implement a defined (save) state if the COMP gets reset.

Johannes