[STM32L4] Bit banding

sunny · ‎2016-06-15

Posted on June 15, 2016 at 10:27

Hi,

I want to use the Bit Banding region of STM32L4 but I do not know how to modify the linker script for the same.

I tried to follow the https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=%2Fpublic%2FSTe2ecommunities%2Fmcu%2FLists%2Fcortex_mx_stm32%2FC%20compilers%20and%20bit%20banding&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=459

and the ARM Infocenter mentioning the C-Code to access the Bit-Banding region starting at 0x20000000 but since I have not seperated the bit-banding region in linker script, the 0x20000000 location gets over written by the code.

Can somebody please help me out for the same ?

Also, if we use the Bit-band region e.g. 4 bytes of the SRAM bit-band region which translates to 128 (32*4) bytes of bit aliased region, then do I have to leave 128 bytes of SRAM memory in the linker file ?

Below is my linker script:

; *************************************************************

; *** Scatter-Loading Description File generated by uVision ***

; *************************************************************

LR_IROM1 0x08000000 0x00100000 { ; load region size_region

ER_IROM1 0x08000000 0x00100000 { ; load address = execution address

*.o (RESET, +First)

*(InRoot$$Sections)

.ANY (+RO)

}

RW_IRAM1 0x20000000 0x00018000 { ; RW data

*.o (RESET_ram, +First)

.ANY (+RW +ZI)

}

RW_IRAM2 0x10000000 0x00008000 {

.ANY (+RW +ZI)

}

Thanks,

Sunny

#stm32l4 #bit-band

Tesla DeLorean · ‎2016-06-16

Posted on June 16, 2016 at 22:26

sorry, operating somewhat blindly here, just modding earlier examples, tested this

LR_IROM1 0x08000000 0x00100000 { ; load region size_region
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000004 0x00017FFC { ; RW data advance and shrink
*.o (RESET_ram, +First)
.ANY (+RW +ZI)
}
RW_IRAM2 0x10000000 0x00008000 {
.ANY (+RW +ZI)
*.o (.ccm)
}
RW_SRAM_BB 0x22000000 0x80 { ; RW data 4 * 4 * 8, each byte as 8x 32-bit words
*.o (.srambb)
}
}

unsigned volatile long __attribute__ ((section(''.srambb''))) bitBandVar1; // Holds 0x00000000 or 0xFFFFFFFF ONLY
char buf[256] __attribute__ ((section(''.ccm'')));

Execution Region RW_IRAM2 (Base: 0x10000000, Size: 0x00000500, Max: 0x00008000, ABSOLUTE)
Base Addr Size Type Attr Idx E Section Name Object
0x10000000 0x00000100 Data RW 142 .ccm main.o
...
Execution Region RW_SRAM_BB (Base: 0x22000000, Size: 0x00000004, Max: 0x00000080, ABSOLUTE)
Base Addr Size Type Attr Idx E Section Name Object
0x22000000 0x00000004 Data RW 143 .srambb main.o
...

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sunny · ‎2016-06-22

Posted on June 22, 2016 at 12:36

Hi Clive,

Sorry for replying late.

The linker file that you sent is perfect.

Really appreciate it.

I have just tested it in main(). I need to write proper code to use it in my project, but I guess it should work fine.

Thanks,

Sunny