STM32l1 Nucleo bord using LSE instead of LSI

[Archak Boyajian]

Posted on May 17, 2017 at 18:24

I want to activate the LSE clock on STM32L1 board using processor stm32l152xe on Nucleo board. board 

version MB1136 C-03. I far as I can tell no hardware changes required to get the LSE to work.

My plan is to run the real time clock externally that interrupts TIM9 for accurate measurements.

DO I have to see high voltage (3.3 volts) at the output of the Port C pin 15 (PC15), for the LSE crystal to operate properly on STM32L1 Nucleo board? I was not able to see the voltage going high at that pin.

I have initialized the system clocks as follows:

void

SystemClock_Config(

void

)

{

RCC_ClkInitTypeDef

RCC_ClkInitStruct = {0};

RCC_OscInitTypeDef

RCC_OscInitStruct = {0};

/* Enable HSI Oscillator and Activate PLL with HSI as source */

//  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;

  RCC_OscInitStruct.

OscillatorType

= RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE

                              |RCC_OSCILLATORTYPE_MSI;

   RCC_OscInitStruct.

LSEState

= RCC_LSE_ON;

   RCC_OscInitStruct.

HSIState

= RCC_HSI_ON;

  RCC_OscInitStruct.

HSICalibrationValue

= RCC_HSICALIBRATION_DEFAULT;

  RCC_OscInitStruct.

MSIState

= RCC_MSI_ON;

  RCC_OscInitStruct.

MSICalibrationValue

= 0;

  RCC_OscInitStruct.

MSIClockRange

= RCC_MSIRANGE_5;

  RCC_OscInitStruct.

PLL

.

PLLState

= RCC_PLL_ON;

  RCC_OscInitStruct.

PLL

.

PLLSource

= RCC_PLLSOURCE_HSI;

  RCC_OscInitStruct.

PLL

.

PLLMUL

= RCC_PLL_MUL6;

  RCC_OscInitStruct.

PLL

.

PLLDIV

= RCC_PLL_DIV3;

if

(HAL_RCC_OscConfig(&RCC_OscInitStruct) !=

HAL_OK

)

  {

    Error_Handler();

  }

/* Set Voltage scale1 as MCU will run at 32MHz */

  __PWR_CLK_ENABLE();

  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

/* Poll VOSF bit of in PWR_CSR. Wait until it is reset to 0 */

while

(__HAL_PWR_GET_FLAG(PWR_FLAG_VOS) !=

RESET

) {};

/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2

  clocks dividers */

  RCC_ClkInitStruct.

ClockType

= (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);

  RCC_ClkInitStruct.

SYSCLKSource

= RCC_SYSCLKSOURCE_PLLCLK;

  RCC_ClkInitStruct.

AHBCLKDivider

= RCC_SYSCLK_DIV1;

  RCC_ClkInitStruct.

APB1CLKDivider

= RCC_HCLK_DIV1;

  RCC_ClkInitStruct.

APB2CLKDivider

= RCC_HCLK_DIV1;

if

(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) !=

HAL_OK

)

  {

    Error_Handler();

  }

}

The TIM9 clock is  initialized as follows:

void

rtimer_arch_init_external(

void

)

/* TIM9

init

function */

//static void MX_TIM9_Init(void)

{

TIM_ClockConfigTypeDef

sClockSourceConfig;

TIM_IC_InitTypeDef

sConfigIC;

TIM_SlaveConfigTypeDef

sSlaveConfig;

TIM_MasterConfigTypeDef

sMasterConfig;

  htim9.

Instance

= TIM9;

  htim9.

Init

.

Prescaler

= 0;

  htim9.

Init

.

CounterMode

= TIM_COUNTERMODE_UP;

  htim9.

Init

.

Period

= 0;

  htim9.

Init

.

ClockDivision

= TIM_CLOCKDIVISION_DIV1;

if

(HAL_TIM_Base_Init(&htim9) !=

HAL_OK

)

  {

Error_Handler

();

  }

  sClockSourceConfig.

ClockSource

= TIM_CLOCKSOURCE_ETRMODE2;

  sClockSourceConfig.

ClockPolarity

= TIM_CLOCKPOLARITY_NONINVERTED;

  sClockSourceConfig.

ClockPrescaler

= TIM_CLOCKPRESCALER_DIV1;

  sClockSourceConfig.

ClockFilter

= 0;

if

(HAL_TIM_ConfigClockSource(&htim9, &sClockSourceConfig) !=

HAL_OK

)

  {

Error_Handler

();

  }

  sMasterConfig.

MasterOutputTrigger

= TIM_TRGO_RESET;

  sMasterConfig.

MasterSlaveMode

= TIM_MASTERSLAVEMODE_DISABLE;

if

(HAL_TIMEx_MasterConfigSynchronization(&htim9, &sMasterConfig) !=

HAL_OK

)

  {

Error_Handler

();

  }

if

(HAL_TIM_IC_Init(&htim9) !=

HAL_OK

)

  {

Error_Handler

();

  }

if

(HAL_TIMEx_RemapConfig(&htim9, TIM_TIM9_LSE) !=

HAL_OK

)

  {

Error_Handler

();

  }

  sConfigIC.

ICPolarity

= TIM_INPUTCHANNELPOLARITY_RISING;

  sConfigIC.

ICSelection

= TIM_ICSELECTION_DIRECTTI;

  sConfigIC.

ICPrescaler

= TIM_ICPSC_DIV1;

  sConfigIC.

ICFilter

= 0;

if

(HAL_TIM_IC_ConfigChannel(&htim9, &sConfigIC, TIM_CHANNEL_1) !=

HAL_OK

)

  {

Error_Handler

();

  }

                  st_lib_hal_tim_clear_flag(&htim9, TIM_FLAG_UPDATE);

/* Enable TIM10 Update interrupt */

                  st_lib_hal_tim_enable_it(&htim9, TIM_IT_UPDATE);

                  st_lib_hal_tim_enable(&htim9);

                  st_lib_hal_nvic_set_priority((st_lib_irq_n_type)

TIM9_IRQn

, 0, 0);

                 st_lib_hal_nvic_enable_irq((st_lib_irq_n_type)(

TIM9_IRQn

));

}

Thanks.