STM32L0 Current Drive for GPIO in STOP 0

[Rogers.Gary]

Hello:

Hoping to find out the answer to a question that I cannot find in the data sheet for the part.

What is the the drive current used to keep a GPIO pin enabled (SET) while in STOP 0?

Page 65 of the data sheet indicates a value of 2.5uA/MHz in range 3, which is what I am using, but only shows a value for LPR and SLEEP.

Thanks for any feedback on this.

Gary

[TDK]

> What is the the drive current used to keep a GPIO pin enabled (SET) while in STOP 0?

The pin will source whatever current you need to drive the line (up to its limits). If you have something like an LED, it could be significant. If the pin is floating, it should be almost zero.

[Rogers.Gary]

It's configured as an open drain, no pu/pd, and the pin is connected to something other than the supply of the STM32L0. It's sourcing about 12uA through the OD P-CHN device to ground. Not much at all. As you might realize the pin is ON when in reset (as the bottom device is a P-CHN). So in STOP, the pin will stay in RESET to keep the external device off.

I've tested the circuit on a NUCLEO board and works well. But still leaves the question, "How much current consumed driving the gate when leaving the P-CHN device enabled?" Less than...5uA? As indicated...the datasheet is not clear for STOP, only sleep or LPR.

I want to calculate the total STOP current used by the device including all GPIO.

Thanks for your help.