STM32H743XGH6 PLL1 DIVP1: Is divide by 1 possible?

NiM · ‎2025-07-17

Is it possible to divide by 1 for DIVP of PLL1?

According to RM0433 Rev8, DIVP of PLL1 is capable of dividing by 1.
However, I could not set division by 1 in CubeIDE. (It is possible that my setting is incorrect.)

Andrew Neil · ‎2025-07-17

https://community.st.com/t5/stm32cubemx-mcus/stm32h753-clock-configuration-divp1-drop-down-can-not-be-set-to/td-p/235007

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

View solution in original post

Andrew Neil · ‎2025-07-17

https://community.st.com/t5/stm32cubemx-mcus/stm32h753-clock-configuration-divp1-drop-down-can-not-be-set-to/td-p/235007

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

mƎALLEm · ‎2025-07-17

Hello,

You need to provide your ioc file.

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NiM · ‎2025-07-17

Thank you very much.
It was very helpful.

It was the very answer I wanted to know.