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STM32H743 Using peripheral to memory transfer via DMA works only once.

PTher.3
Associate II

I am using HAL_DMA_Start_IT(..) to read data from GPIO that is triggered via a Timer IC. It works the first time, but if I use HAL_DMA_Start_IT(..) again the destination memory is not updated but I get the transfer complete interrupt. If I use a different destination memory address the 2nd time it works. Also if I do a memset() to clear the destination memory, before the 1st transfer, it also does not work. Also placed the destination memory in D2 RAM, but made no difference. Also disabled D-Cache globally that made no difference.

4 REPLIES 4
FBL
ST Employee

Hello & welcome to ST community

Is the number of data items known in advance?

If not, I propose to add DMA timeout.

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PTher.3
Associate II

Hello. Thank you.

Yes the number of items is known. I managed to resolve it by doing the following:

  1. Disable D-Cache memory in the linker file.
  2. Call this function: SCB_InvalidateDCache_by_Addr((uint32_t *)&(ADResultArray[0]),sizeof(ADResultArray)); every time before initialing a DMA transfer.

To initiate a DMA transfer I use this: HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)

JStoe
Associate II

How can you disable D-Cache in the linker file ? And shouldn't D-Cache be disabled by default unless you enable it using e.g. SCB_EnableDCache() ?

Also, if you already disabled D-Cache, are you sure it is necessary to invalidate the cache ?

PTher.3
Associate II

I followed the instructions on: DMA is not working on STM32H7 devices replacing DTCMRAM with RAM_D1 in the .data, .bss and .user_heap_stack sections in the linker file. D and I cache is actually enabled with SCB_EnableICache(); and SCB_EnableDCache(); , sorry I did this a while ago and forgot what I have done.

If I do not invalidate the cache, the DMA transfer works only once for the same memory location. Also had to do it in the Ethernet network interface drivers for lwIP for the Ethernet Rx buffer.