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STM32H743, SPI and DMA

jakob.brunhart
Associate III

0693W00000aHka8QAC.pngHello

The Flash (MT25QL256ABA) is connectd to the STM32H743ZI (Nucleo) via SPI_3 and DMA. Send and Receive buffer are part of the SRAM3 area. There is no cache enabled.

To erase the flash the following procedure is done:

  1. Send Write Enable Command (HAL_SPI_Transmit_DMA())
  2. Send Erase Command (HAL_SPI_Transmit_DMA())
  3. Poll for Flash Status Register (HAL_SPI_TransmitReceive_DMA()).

If the status register changes from 0x81 ot 0x01 the erase is done. I see that change with the logic analyzer but the receive buffer is not updated (no coherent data).

If I replace the HAL_SPI_Transmit_DMA() at step 1 and 2 the receive buffer is coherent to the datat measured by the logic analyzer.

Any idea?

Thank you.

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