2018-06-24 10:35 AM
Hello.,.,
We are using STM32H743BIT MCU in our project , I used stm cubeMX to generate driver files (for Keil 5 IDE). In this I am facing an issue in Ethernet interface , Here I can able to Transmit/Receive UDP packet of maximum 512bytes , If I send more then 512Bytes at a time its going to Hard fault handler.
This is my packet send function , It was working for STM32F7 MCU (even more then 1024 bytes at a time), Now it is not working for STM32H7 MCU.
void UDP_packet_send(uint8_t *Tx_buf,uint16_t length)
{ struct udp_pcb * pcb; ip_addr_t ipaddr; struct pbuf *p; err_t error; pcb = udp_new(); if (pcb == NULL) { LWIP_DEBUGF(UDP_DEBUG, ('udp_new failed!\n')); } if (udp_bind(pcb, IP_ADDR_ANY, 333) != ERR_OK) { LWIP_DEBUGF(UDP_DEBUG, ('udp_bind failed!\n')); }p = pbuf_alloc (PBUF_TRANSPORT, 8, PBUF_POOL); /* Allocating temporary Memory in RAM for PBUF*/
p->flags = 0;p->len = length;p->next = NULL ; p->ref = 0x01; p->tot_len = length; p->type = 0x03; memcpy(p->payload,Tx_buf,length); IP4_ADDR(&ipaddr, 192.168.16.100); error = udp_sendto(pcb, p, &ipaddr, 1100); //Sender_PORT pbuf_free(p); /* De-Allocating temporary Memory in RAM */ udp_remove(pcb); return;}Here i am taking 2
ETH_RX_DESC_CNT, 2 ETH_TX_DESC_CNT, And is there anything need to be change in following configuration , Please suggest.
&sharppragma location=0x30040000
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */&sharppragma location=0x30040060ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */&sharppragma location=0x30040200uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE]; /* Ethernet Receive Buffers */&sharpelif defined ( __CC_ARM ) /* MDK ARM Compiler */
__attribute__((at(0x30040000))) ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT]; /* Ethernet Rx DMA Descriptors */
__attribute__((at(0x30040060))) ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT]; /* Ethernet Tx DMA Descriptors */__attribute__((at(0x30040200))) uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE]; /* Ethernet Receive Buffer */&sharpelif defined ( __GNUC__ ) /* GNU Compiler */
ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section('.RxDecripSection'))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section('.TxDecripSection'))); /* Ethernet Tx DMA Descriptors */uint8_t Rx_Buff[ETH_RX_DESC_CNT][ETH_MAX_PACKET_SIZE] __attribute__((section('.RxArraySection'))); /* Ethernet Receive Buffers */Thank you
#stm32h7-ethernet #keil-mdk5 #stm322018-06-26 05:24 PM
My five cents (remarks):
a) be careful: D2 RAMs (SRAM1..SRAM3) are not powered on per default. You had to enable clocks for these RAMs.
You seem to use SRAM3 (0x30040000...), for DMA descriptors. Maybe your RAM is off and the DMA descriptor messed up (memory fault due to memory not access-able, off or DMA descriptor is garbage, it was not really written, memory is off)b) make sure that the regions for the DMA descriptors are non-cacheable:
configure also the MPU to make sure the DMA is coherent. Otherwise DMA could see incomplete descriptors (caches not
written back to memory), for the data and the DMA descriptors, as well, I think. Or use/add cache maintenance function calls (maybe a need to modify LwIP source code if you would go this way).c) BTW: DTCM is not access-able for Ethernet MAC (actually for any peripheral and DMA, except for
MDMA as mem-to-mem), just to make sure that data for ETH is not placed on DTCM.LwIP works fine for me (with these two issues in mind, as HTTPD).
2018-06-27 04:03 AM
Hi
karthikshivanna.94
,Besides to the proposal of
Jaekel.Torsten
, I recommend you to havea look to .Please update us whatever this was helpful for you and you found a solution or you still have an issue.
-Amel
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2018-06-27 09:19 AM
Hello Amel N.,
The issue is still not resolved , I just gone through link you suggested , I will update you if I could make any improvement.