I'm hoping to get clarification on the dual-bank flash availability in STM32G47x parts with fewer than 512K of FLASH. The datasheets (DS12288 & DS12712) cover the B, C and E flash sizes. The first page refers to "up to 512KB Flash", yet there is no discussion or confirmation of reduced-size sectors in section 3.4 of the datasheet. In fact, section 3.4 states that "The STM32G474xB/xC/xE devices feature 512 kbytes of embedded Flash memory..."
To focus my question a bit, can I use an xB part (with 128KB Flash) and still have the dual-bank capability? I'm a little paranoid after a recent discovery that the STM32H750 has only one sector and no ability to perform a "page erase" - it's all or none! That crushed me...
Thank you for any insight you all may offer!
Well thing is most of the parts share the same die, the H750 has 2MB it is mostly pretending isn't there. The "test time" means they could probably test a dozen H750 in the time it takes to test one H743, and this changes the machine throughput quite dramatically.
The STM32G47x has 2KB erase blocks, so you could split the loader vs app across multiple pages or banks. Banking allows for concurrent erase/write with execution, without it simple stalls the processor 25ms
Thank you for the confirmation. As you may agree, it would be reckless to presume untested memory or other features are available/functional now or in future revisions. But, since dual-bank is not a "must have" on my list, I can proceed without knowing how it is handled in the sub-512K parts. It would be nice if ST addressed these datasheet errors and ambiguities though. Patience should do the job...
Thank you again for all your contributions.