Hello,
I'm having an issue while programming a small section of FLASH memory during runtime of my device.
Our device executes its program from FLASH memory. In-addition, we reconfigured the systick timer to run at 20kHz and this is the heartbeat of our program. Every 1/20kHz secs, the device reads the user input and then updates some signal outputs.
Occasionally we need to save state so that we can recall certain settings in-case of a loss of power. To do this, we set a flag and then in the main while() loop we initiate a write to flash memory. We only need to write 64 bytes and we do it using a wear-leveling technique. I was expecting this to happen seamlessly in the background but I was surprised to find that it interrupts the flow of the systick code (even though this is a high priority interrupt). This results in a glitch in the user interface that is noticeable in certain scenarios.
I've used a pair of GPIO pins to show what happens:
-The top pulse is the systick heartbeat. We set the gpio pin high when we start executing this code and then set it low when we're done.
-The bottom pulse is from the main while() loop that briefly attempts to write to flash memory.
My question is - is this there any way to avoid this stall? Is it not possible on G473 to write to flash memory while executing from flash?
I suppose I could run the code from SRAM but I thought I'd see if there was another workaround.
1 ACCEPTED SOLUTION
Accepted Solutions
If your device is in dual bank mode (DBANK=1), you can write your user data to one bank while your code continues to be read and executed from the other bank.
In single bank mode, there is no way to avoid a bus stall when you write other than running code from RAM.
If your device is in dual bank mode (DBANK=1), you can write your user data to one bank while your code continues to be read and executed from the other bank.
In single bank mode, there is no way to avoid a bus stall when you write other than running code from RAM.
I thought you might say that! Unfortunately our application is big enough where we have to use both bank 1 and 2.
I went ahead and updated our bootloader and linker to run from SRAM. It resolved my issue. No more glitch. Thanks for the confirmation. 🙂
